Patent Assignment
Reel/Frame 021637/0351
Assignment of Assignor's Interest
Recorded: 2008-10-06
Pages: 15
Assignor
IMPINJ, INC.
Executed: 2008-06-25
Assignee
VIRAGE LOGIC CORPORATION
47100 BAYSIDE PARKWAY, FREMONT, CALIFORNIA, 94538
Covered Properties
(75)
Rewritable Electronic Fuses
PCT:
PCT/US2005/010431 ↗
Rewriteable Electronic Fuses
PCT:
PCT/US2005/010432 ↗
Method and Apparatus for Trimming High-Resolution Digital-to-Analog Converter
Patent:
6,664,909 →
Application:
09/929,652 →
High Voltage Charge Pump Circuit
Patent:
6,661,278 →
Application:
10/191,779 →
Method and Apparatus for Preventing Overtunneling in Pfet-Based Nonvolatile Memory Cells
Use of Analog-Valued Floating-Gate Transistors for Parallel and Serial Signal Processing
Patent:
7,187,237 →
Application:
10/268,116 →
Method and Apparatus for Calibration of an Array of Scaled Electronic Circuit Elements
Patent:
6,909,389 →
Application:
10/281,384 →
Differential Floating Gate Nonvolatile Memories
Autozeroing Floating-Gate Amplifier
Patent:
6,958,646 →
Application:
10/447,684 →
Method and Apparatus for Suppressing Spurious Values in a Differential Output Current
Patent:
6,977,527 →
Application:
10/455,261 →
Low Distortion Band-Pass Analog to Digital Converter with Feed Forward
Patent:
6,954,159 →
Application:
10/612,829 →
High-Voltage Cmos-Compatible Capacitors
Patent:
6,842,327 →
Application:
10/635,247 →
Interleaved Digital Correction for Mash Delta-Sigma Adc
Patent:
6,873,281 →
Application:
10/652,537 →
Apparatus for Trimming High-Resolution Digital-to-Analog Converter
Patent:
8,102,007 →
Application:
10/661,037 →
Use of Analog-Valued Floating-Gate Transistors to Match the Electrical Characteristics of Interleaved and Pipelined Circuits
Rewriteable Electronic Fuses
Rewriteable Electronic Fuses
High-Voltage Switches in Single-Well Cmos Processes
Rewriteable Electronic Fuses
Counteracting Overtunneling in Nonvolatile Memory Cells Using Charge Extraction Control
Pfet Nonvolatile Memory
Native High-Voltage N-Channel Ldmosfet in Standard Logic Cmos
Graded-Junction High-Voltage Mosfet in Standard Logic Cmos
High-Voltage Cmos-Compatible Capacitors
High-Voltage Cmos-Compatible Capacitors
Method and Apparatus for Programming Single-Poly Pfet-Based Nonvolatile Memory Cells
PMOS memory cell
Application:
10/936,283 →
Publication:
US 2005/0030827
High-Voltage Ldmosfet and Applications Therefor in Standard Cmos
Analog to Digital Converter Using Analog-Valued Floating-Gate Transistors
Use of Analog-Valued Floating-Gate Transistors for Parallel and Serial Signal Processing
Use of Analog-Valued Floating-Gate Transistors for Parallel and Serial Signal Processing
Use of Analog-Valued Floating-Gate Transistors for Parallel and Serial Signal Processing
Compact Non-Volatile Memory Cell and Array System
Inverter Non-Volatile Memory Cell and Array System
Redundant Non-Volatile Memory Cell
Tunneling-enhanced floating gate semiconductor device
Application:
11/133,718 →
Publication:
US 2006/0220096
High Voltage Fet Gate Structure
Pseudo-Nonvolatile Direct-Tunneling Floating-Gate Device
Patent:
8,076,707 →
Application:
11/224,743 →
Hybrid Non-Volatile Memory
Autozeroing Floating-Gate Amplifier
Patent:
7,102,438 →
Application:
11/257,897 →
Capacitive Level Shifting for Analog Signal Processing
High-Voltage Cmos-Compatible Capacitors
Mtp Nvm Elements by-Passed for Programming
Fault Tolerant Non Volatile Memories and Methods
Schottky Junction Diode Devices in Cmos with Multiple Wells
Schottky Junction Diode Devices in Cmos
Use of Analog-Valued Floating-Gate Transistors for Parallel and Serial Signal Processing
Graded Junction High Voltage Semiconductor Device
Reduced Area High Voltage Switch for Nvm
Method and Apparatus for Programming Single-Poly Pfet-Based Nonvolatile Memory Cells
Method and Apparatus for Programming Single-Poly Pfet-Based Nonvolatile Memory Cells
Method and Apparatus for Programming Single-Poly Pfet-Based Nonvolatile Memory Cells
Non-Volatile Memory Cell Circuit with Programming Through Band-to-Band Tunneling and Impact Ionization Gate Current
Non-Volatile Memory with Programming Through Band-to-Band Tunneling and Impact Ionization Gate Current
Non-Volatile Memory Devices Having Floating-Gates Fets with Different Source-Gate and Drain-Gate Border Lengths
Counteracting Overtunneling in Nonvolatile Memory Cells
Inverter Non-Volatile Memory Cell and Array System
One Time Programmable Memory Test Structures and Methods
Patent:
8,122,307 →
Application:
11/768,974 →
Memory Management Unit (Mmu) to Make Only One Time Programmable (Otp) Memory Appear Multiple Times Programmable (Mtp)
Patent:
8,429,375 →
Application:
11/818,757 →
Hybrid Non-Volatile Memory
Electrostatic Discharge Management Apparatus, Systems, and Methods
Patent:
8,022,498 →
Application:
11/837,810 →
Power-On Reset Apparatus, Systems, and Methods
Patent:
7,843,316 →
Application:
11/842,862 →
Pfet Nonvolatile Memory
Radio Frequency Identification Device Electrostatic Discharge Management
Patent:
7,843,032 →
Application:
11/965,307 →
Radio Frequency Identification Device Power-on Reset Management
Patent:
7,872,566 →
Application:
11/965,359 →
Configurable Single Bit/Dual Bits Memory
Patent:
7,719,896 →
Application:
11/981,056 →
Adaptive Programming of Memory Circuit Including Writing Data in Cells of a Memory Circuit
Patent:
7,724,570 →
Application:
11/982,277 →
Methods for Adaptive Programming of Memory Circuit Including Writing Data in Cells of a Memory Circuit
Patent:
7,724,571 →
Application:
11/982,278 →
RFID tag semiconductor chip with memory management unit (MMU) to make only one time programmable (OTP) memory appear multiple times programmable (MTP)
Patent:
8,433,879 →
Application:
12/006,321 →
Rfid Tag Having Non-Volatile Memory Device Having Floating-Gate Fets with Different Source-Gate and Drain-Gate Border Lengths
Radio Frequency (Rfid) Tag Including Configurable Single Bit/Dual Bits Memory
Patent:
7,796,450 →
Application:
12/012,910 →
Rfid Tag with Redundant Non-Volatile Memory Cell
Multi-Level Non-Volatile Memory Cell with High-Vt Enhanced Btbt Device
Non Volatile Memory Circuit with Tailored Reliability
Patent:
7,920,423 →
Application:
12/114,574 →
High-Voltage Switch Using Three Fets
Patent:
8,098,088 →
Application:
12/143,133 →
Related Assignments
(16)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Jan 23, 2002
From: HYDE, JOHN D.; FIGUEROA, MIGUEL E.; HUMES, TODD E.; DIORIO, CHRISTOPHER
To: IMPINJ, INC.
Reel/Frame 012518/0333 →
Assignment of Assignor's Interest
Aug 5, 2003
From: DIORIO, CHRISTOPHER J.; BERNARD, FREDERIC J.
To: IMPINJ, INC.
Reel/Frame 014379/0838 →
Assignment of Assignor's Interest
Aug 11, 2003
From: HYDE, JOHN D.
To: IMPINJ, INC.
Reel/Frame 014372/0040 →
Assignment of Assignor's Interest
Aug 28, 2003
From: ESTERBERG, AANAND; COOPER, SCOTT
To: IMPINJ, INC.
Reel/Frame 014454/0438 →
Assignment of Assignor's Interest
Sep 12, 2003
From: HYDE, JOHN D.; FIGUEROA, MIGUEL E.; HUMES, TODD E.; DIORIO, CHRISTOPHER J.
To: IMPINJ, INC.
Reel/Frame 014520/0156 →
Assignment of Assignor's Interest
Oct 6, 2003
From: COOPER, SCOTT A.; ESTERBERG, AANAND L.
To: IMPINJ, INC.
Reel/Frame 014554/0955 →
Assignment of Assignor's Interest
Mar 5, 2004
From: DIORIO, CHRISTOPHER J.; HUMES, TODD E.; THOMAS, MICHAEL
To: IMPINJ, INC.
Reel/Frame 015034/0150 →
Corrective Assignment to Correct the Assignees Address. Document Previously Recorded at Reel 015034 Frame 0150.
Mar 9, 2004
From: DIORIO, CHRISTOPHER J.; HUMES, TODD E.; THOMAS, MICHAEL
To: IMPINJ, INC.
Reel/Frame 015912/0718 →
Assignment of Assignor's Interest
Apr 21, 2004
From: DIORIO, CHRISTOPHER J.; LINDHORST, CHAD A.; SRINIVAS, SHAILENDRA; PESAVENTO, ALBERTO
To: IMPINJ, INC.
Reel/Frame 015260/0153 →
Assignment of Assignor's Interest
Jul 2, 2004
From: WANG, BIN
To: IMPINJ, INC.
Reel/Frame 015556/0185 →
Assignment of Assignor's Interest
Sep 9, 2004
From: PESAVENTO, ALBERTO; BERNARD, FREDERIC J.; HYDE, JOHN D.
To: IMPINJ, INC.
Reel/Frame 015115/0938 →
Assignment of Assignor's Interest
Sep 14, 2004
From: BERNARD, FREDERIC J.; DIORIO, CHRISTOPHER J.; GILLILAND, TROY N.; PESAVENTO, ALBERTO
To: IMPINJ, INC.
Reel/Frame 015140/0461 →
Assignment of Assignor's Interest
Sep 14, 2004
From: DIORIO, CHRISTOPHER J.; BERNARD, FREDERIC J.; HUMES, TODD E.; PESAVENTO, ALBERTO
To: IMPINJ, INC.
Reel/Frame 015140/0426 →
Assignment of Assignor's Interest
Oct 1, 2004
From: DIORIO, CHRISTOPHER J.; BERNARD, FREDERIC J.; HUMES, TODD E.; PESAVENTO, ALBERTA
To: IMPINJ, INC.
Reel/Frame 015210/0476 →
Assignment of Assignor's Interest
Oct 1, 2004
From: DIORIO, CHRISTOPHER J.; BERNARD, FREDERIC J.; HUMES, TODD E.; PRESAVENTO, ALBERTO
To: IMPINJ, INC.
Reel/Frame 015210/0492 →
Assignment of Assignor's Interest
Oct 8, 2010
From: VIRAGE LOGIC CORPORATION; VL C.V.; ARC CORES LIMITED; ARC INTERNATIONAL I.P., INC.
To: SYNOPSYS, INC.
Reel/Frame 025105/0907 →