Method and apparatus for programming single-poly pFET-based nonvolatile memory cells
View Patent ↗Methods and apparatuses for programming a single-poly pFET-based nonvolatile memory cell bias the cell so that band-to-band tunneling (BTBT) is induced and electrons generated by the BTBT are injected onto a floating gate of the cell. Following a predetermined event, the single-poly pFET is biased to induce impact-ionized hot-electron injection (IHEI). The predetermined event may be, for example, the expiration of a predetermined time period or a determination that a channel has been formed by the BTBT injection process that is sufficiently conducting to support IHEI. Employing BTBT permits a previously overerased or stuck bit to be “unstuck” or “removed” and thus be made usable (i.e., able to be programmed) again.
1. A method for programming a single-poly pFET-based nonvolatile memory cell having a pFET including a drain, a source and a floating gate, said method comprising:
biasing the pFET to induce band-to-band tunneling (BTBT) and thereby inject electrons onto the floating gate; and
after a predetermined event, biasing the pFET to induce impact-ionized hot-electron injection (IHEI).
2. The method of claim 1 , wherein the predetermined event is the expiration of a predetermined time period.
3. The method of claim 2 , further comprising alternating between biasing the pFET to induce BTBT and biasing the pFET to induce IHEI.
4. The method of claim 1 , wherein the predetermined event is based on a determination that a source current through the pFET exceeds a reference current.
5. The method of claim 1 , wherein the single-poly pFET-based nonvolatile memory cell has a stuck bit prior to biasing the pFET to induce BTBT.
6. The method of claim 5 , wherein the induced BTBT is employed to remove the stuck bit.
7. The method of claim 1 , wherein the single-poly pFET-based nonvolatile memory cell had been previously overerased prior to biasing the single-poly pFET to induce BTBT.
8. The method of claim 7 , wherein the induced BTBT is employed to remove the overerased condition.
9. A programming apparatus for programming a single-poly pFET-based nonvolatile memory cell having a single-poly pFET including a drain, a source and a floating gate, said apparatus comprising:
means for biasing the single-poly pFET to induce band-to-band tunneling (BTBT) and inject electrons onto the floating gate; and
means for biasing the single-poly pFET to induce impact-ionized hot-electron injection (IHEI) after a predetermined event occurs.
10. The programming apparatus of claim 9 , wherein the predetermined event is the expiration of a predetermined time period.
11. The programming apparatus of claim 10 , wherein said means for biasing further comprises means for alternating between biasing the single-poly pFET to induce BTBT and biasing the single-poly pFET to induce IHEI.
12. The programming apparatus of claim 9 , wherein the predetermined event is based on a determination that a source current through the single-poly pFET exceeds a reference current.
13. The programming apparatus of claim 9 , wherein the single-poly pFET-based nonvolatile memory cell has a stuck bit prior to being programmed by the programming apparatus.
14. The programming apparatus of claim 13 , wherein the induced BTBT is employed to cause the stuck bit to be removed.
15. The programming apparatus of claim 9 , wherein the single-poly pFET-based nonvolatile memory cell had been previously overerased prior to biasing the single-poly pFET to induce BTBT.
16. The programming apparatus of claim 15 , wherein the induced BTBT is employed to remove the overerased condition.