Multi-protocol communication circuit
View Patent ↗A multi-protocol communication circuit, for example, a serializer-deserializer (SerDes) circuit for communicating between an internal logic circuit and an external link includes a select terminal configured to accept a select signal representing a plurality of mode select signal. A SerDes core is coupled to the select terminal and configured to transmit outbound data conforming with a first communication protocol in response to a first mode select signal and conforming with a second communication protocol in response to a second mode select signal. The SerDes core is also configured to receive inbound data respective to a first communication protocol in response to a first mode select signal and respective to a second communication protocol in response to a second mode select signal. Advantages of the invention include the ability to provide high bandwidth communications between integrated circuits that employ different SerDes protocols.
1. A multi-protocol serializer/deserializer (SerDes) circuit for communicating between an internal logic circuit and an external link, comprising:
a plurality of internal communication terminals configured to receive outbound information from the logic circuit and transmit inbound information to the logic circuit;
an external communication terminal configured to transmit outbound information to the external link and receive inbound information from the external link;
a select terminal configured to accept a mode select signal representing a plurality of different communication protocols, said communication protocols differing in communication signaling and format and not only in communication speed; and
a single SerDes core configured to handle each of said plurality of different protocols, said SerDes core coupled to the select terminal and configured to transmit outbound data conforming with one of said plurality of communication protocols in response to the mode select signal, and to receive inbound data respective to one of said plurality of communication protocols in response to the mode select signal.
2. The multi-protocol SerDes of claim 1 , wherein:
said external communication terminal is a plurality of external communication terminals.
3. The multi-protocol SerDes of claim 1 , wherein
each of the communication protocols include a number of communication parameters; and
the SerDes core is configured to transmit outbound data conforming with a combination of more stringent communication parameters of the communication protocols.
4. The multi-protocol SerDes of claim 1 , wherein
the SerDes core is adapted to receive inbound data respective to a combination of less stringent communication tolerances of the communication protocols.
5. The multi-protocol SerDes of claim 3 , wherein
the SerDes core is adapted to receive inbound data respective to a combination of less stringent communication tolerances of the communication protocols.
6. The multi-protocol SerDes of claim 3 , wherein
each of the communication protocols includes a number of communication parameters; and
the SerDes core is adapted to communicate within communication parameters and tolerances conforming with the selected protocol.
7. The multi-protocol SerDes of claim 1 , further comprising:
a second select terminal configured to accept a mode select signal representing a second plurality of protocols; and
a second SerDes core coupled to the second select terminal and configured to transmit outbound data conforming with one of said second plurality of communication protocols in response to the mode select signal, and to receive inbound data respective to one of said second plurality of communication protocols in response to the mode select signal.
8. The multi-protocol SerDes of claim 1 , wherein
the communication protocols include the set of PCI-Express protocol and XAUI protocol.
9. The multi-protocol SerDes of claim 1 , wherein
the communication protocols include the set of PCI-Express protocol, XAUI protocol, GigE protocol, and GigE SGMII protocol.
10. The multi-protocol SerDes of claim 6 , wherein
the communication protocols include the set of PCI-Express protocol and XAUI protocol.
11. The multi-protocol SerDes of claim 6 , wherein
the communication protocols include the set of PCI-Express protocol, XAUI protocol, GigE protocol, and GigE SGMII protocol.
12. A method of communicating between an internal logic circuit and an external link, comprising the steps of:
accepting a mode select signal representing a plurality of different communication protocols at a SerDes circuit comprising a single SerDes core configured to handle each of said plurality of different communication protocols and an external communication terminal configured to transmit outbound information to the external link and receive inbound information from the external link, said communication protocols differing in communication signaling and format and not only in communication speed; and at least one of:
(a) transmitting outbound data conforming with one of said plurality of communication protocols in response to the mode select signal; and
(b) receiving inbound data respective to one of said plurality of communication protocols in response to the mode select signal.
13. The method of claim 12 , wherein the method comprises steps (a) and (b).
14. The method of claim 12 , wherein: each of the communication protocols includes a number of communication parameters; and
the transmitting step transmits outbound data conforming with a combination of more stringent communication parameters of the communication protocols.
15. The method of claim 12 , wherein:
the receiving step receives inbound data respective to a combination of less-stringent communication tolerances of the communication protocols.
16. The method of claim 14 , wherein
the receiving step receives inbound data respective to a combination of less-stringent communication tolerances of the communication protocols.
17. The method of claim 13 , wherein:
each of the communication protocols includes a number of communication parameters;
the transmitting step transmits outbound data conforming with a combination of more-stringent communication parameters of the communication protocols;
the receiving step receives inbound data respective to a combination of less-stringent communication tolerances of the communication protocols.
18. The method of claim 12 , wherein
each of the communication protocols includes a number of communication parameters;
the transmitting step transmits outbound data conforming with communication parameters conforming with the selected protocol; and
the receiving step receives inbound data conforming with communication tolerances conforming with the selected protocol.
19. The method of claim 12 , wherein
the communication protocols include the set of PCI-Express protocol and XAUI protocol.
20. The method of claim 12 , wherein
the communication protocols include the set of PCI-Express protocol, XAUI protocol, GigE protocol, and GigE SGMII protocol.
21. The method of claim 18 , wherein: the communication protocols include the set of PCI-Express protocol and XAUI protocol.
22. The method of claim 18 , wherein
the communication protocols include the set of PCI-Express protocol, XAUI protocol, GigE protocol, and GigE SGMII protocol.
23. A multi-protocol communication circuit for communicating between an internal logic circuit and an external link comprising:
a plurality of internal communication terminals configured to receive outbound information from the logic circuit and transmit inbound information to the logic circuit;
an external communication terminal configured to transmit outbound information to the external link and receive inbound information from the external link;
a select terminal configured to accept a mode select signal representing a plurality of different communication protocols, said communication protocols differing in communication signaling and format and not only in communication speed; and
a single SerDes core configured to handle each of said plurality of different protocols, said SerDes core coupled to the select terminal and configured to transmit outbound data conforming with one of said plurality of communication protocols in response to the mode select signal, and to receive inbound data respective to one of said plurality of communication protocols in response to the mode select signal.
24. The multi-protocol communication circuit of claim 23 , wherein:
said external communication terminal is a plurality of external communication terminals.
25. The multi-protocol communication circuit of claim 23 , wherein: each of the communication protocols include a number of communication parameters; and
the communication core is configured to transmit outbound data conforming with a combination of more-stringent communication parameters of the communication protocols.
26. The multi-protocol communication circuit of claim 23 , wherein:
the communication core is adapted to receive inbound data respective to a combination of less-stringent communication tolerances of the communication protocols.
27. The multi-protocol communication circuit of claim 25 , wherein:
the communication core is adapted to receive inbound data respective to a combination of less-stringent communication tolerances of the communication protocols.
28. The multi-protocol communication circuit of claim 23 , wherein:
each of the communication protocols includes a number of communication parameters; and
the communication core is adapted to communicate within communication parameters and tolerances conforming with the selected protocol.
29. The multi-protocol communication circuit of claim 28 , further comprising:
a second select terminal configured to accept a second mode select signal representing a second plurality of protocols; and
a second communication core coupled to the second select terminal and configured to transmit outbound data conforming with one of said second plurality of communication protocols in response to the mode select signal, and to receive inbound data respective to one of said second plurality of communication protocols in response to the mode select signal.
30. The multi-protocol SerDes of claim 1 , wherein the plurality of protocols control a data type and a protocol communication with the external communication terminal.