IP Library Granted Patent US 7,049,187
Granted Patent B2
US 7,049,187 · App. 10/468,441 · Granted May 23, 2006

Manufacturing method of polymetal gate electrode

Assignee: Renesas Technology Corp.
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Quick Facts
Patent No.
US 7,049,187
App. No.
10/468,441
Granted
May 23, 2006
Kind
B2
Abstract

When an oxidation treatment for regenerating a gate insulating film 6 is performed after forming gate electrodes 7 A of a polymetal structure in which a WN x film and a W film are stacked on a polysilicon film, a wafer 1 is heated and cooled under conditions for reducing a W oxide 27 on the sidewall of each gate electrode 7 A. As a result, the amount of the W oxide 27 to be deposited on the surface of the wafer 1 is reduced.

Claims (48)

1. A method for manufacturing a semiconductor integrated circuit device, comprising the steps of:

(a) forming a refractory metal film over a first principal surface of a wafer;

(b) heating the first principal surface of the wafer having the refractory metal film up to a first temperature of 600 degrees centigrade or more under conditions for reducing an oxide of the refractory metal;

(c) subjecting a portion of or over the first principal surface of the wafer containing silicon as a main component to an oxidation treatment at the first temperature in a mixed gas atmosphere containing hydrogen, and moisture catalytically synthesized from oxygen and hydrogen without oxidizing the refractory metal film; and

(d) washing the first principal surface of the wafer by a neutral or weakly alkaline water or chemical solution, substantially not containing hydrogen peroxide, after the step (c).

2. The method for manufacturing a semiconductor integrated circuit device according to claim 1 , further comprising the step of:

cooling the first principal surface of the wafer down to a second temperature of less than 500 degrees centigrade under reducing conditions for the refractory metal after the step (c).

3. The method for manufacturing a semiconductor integrated circuit device according to claim 2 , wherein the second temperature is 400 degrees centigrade.

4. The method for manufacturing a semiconductor integrated circuit device according to claim 3 , wherein the second temperature is 300 degrees centigrade.

5. The method for manufacturing a semiconductor integrated circuit device according to claim 4 , wherein the second temperature is 200 degrees centigrade.

6. The method for manufacturing a semiconductor integrated circuit device according to claim 5 , wherein the second temperature is 100 degrees centigrade.

7. The method for manufacturing a semiconductor integrated circuit device according to claim 6 , wherein the second temperature falls within a range of from 70 degrees centigrade to 20 degrees centigrade.

8. The method for manufacturing a semiconductor integrated circuit device according to claim 1 , wherein the portion containing silicon as a main component includes a silicon base surface region containing silicon as a main component, which constitutes at least a part of the first principal surface of the wafer, and a silicon base film region containing silicon as a main component over the first principal surface of the wafer.

9. The method for manufacturing a semiconductor integrated circuit device according to claim 8 , wherein the pressure of the mixed gas atmosphere is an atmospheric pressure or falls in a subatmospheric region.

10. The method for manufacturing a semiconductor integrated circuit device according to claim 9 , wherein the mixed gas contains a nitrogen gas, an argon gas, or a helium gas.

11. The method for manufacturing a semiconductor integrated circuit device according to claim 1 , wherein the refractory metal film contains molybdenum or tungsten as a main component.

12. A method for manufacturing a semiconductor integrated circuit device, comprising the steps of:

(a) forming a refractory metal film over a first principal surface of a wafer;

(b) heating the first principal surface of the wafer having the refractory metal film up to a first temperature of 600 degrees centigrade or more by lamp heating under conditions for reducing an oxide of the refractory metal film;

(c) subjecting a portion of or over the first principal surface of the wafer containing silicon as a main component to an oxidation treatment at the first temperature in a mixed gas atmosphere containing hydrogen and moisture without oxidizing the refractory metal film; and

(d) washing the first principal surface of the wafer by a neutral or weakly alkaline water or chemical solution substantially not containing hydrogen peroxide, after the step (c).

13. The method for manufacturing a semiconductor integrated circuit device according to claim 12 , further comprising the step of:

cooling the first principal surface of the wafer down to a second temperature of less than 500 degrees centigrade under reducing conditions for the refractory metal film after the step (c).

14. The method for manufacturing a semiconductor integrated circuit device according to claim 13 , wherein the second temperature is 400 degrees centigrade.

15. The method for manufacturing a semiconductor integrated circuit device according to claim 14 , wherein the second temperature is 300 degrees centigrade.

16. The method for manufacturing a semiconductor integrated circuit device according to claim 15 , wherein the second temperature is 200 degrees centigrade.

17. The method for manufacturing a semiconductor integrated circuit device according to claim 16 , wherein the second temperature is 100 degrees centigrade.

18. The method for manufacturing a semiconductor integrated circuit device according to claim 17 , wherein the second temperature falls within a range of from 70 degrees centigrade to 20 degrees centigrade.

19. The method for manufacturing a semiconductor integrated circuit device according to claim 12 , wherein the portion containing silicon as a main component includes a silicon base surface region containing silicon as a main component, which constitutes at least a part of the first principal surface of the wafer, and a silicon base film region containing silicon as a main component over the first principal surface of the wafer.

20. A method for manufacturing a semiconductor integrated circuit device, comprising the steps of:

(a) forming a film pattern including a refractory metal film over a first principal surface of a wafer;

(b) heating the first principal surface of the wafer including the film pattern up to a first temperature of 600 degrees centigrade or more under conditions for reducing an oxide of the refractory metal film;

(c) forming an insulating film over the first principal surface of the wafer including the film pattern at the first temperature by chemical vapor deposition; and

(d) cooling the first principal surface of the wafer over which the insulating film has been formed by the chemical vapor deposition down to a second temperature of less than 500 degrees centigrade under conditions for reducing an oxide of the refractory metal film.

21. The method for manufacturing a semiconductor integrated circuit device according to claim 20 , wherein the insulating film is a silicon nitride film.

22. The method for manufacturing a semiconductor integrated circuit device according to claim 20 , wherein the heating step is performed in a gas atmosphere containing an ammonia gas.

23. A method for manufacturing a semiconductor integrated circuit device, comprising the steps of:

(a) forming a silicon-base film including germanium over a gate insulating film over a silicon-base surface portion of a first major surface of wafer;

(b) forming a barrier metal film over the silicon-base film;

(c) forming a refractory metal film over the barrier metal film;

(d) forming a first silicon nitride film by plasma CVD over the refractory metal film;

(e) performing heat treatment to the first silicon nitride film by lamp annealing;

(f) forming a second silicon nitride film by low pressure CVD over the first silicon nitride film; and

(g) patterning a gate electrode by dry etching the refractory metal film, the barrier metal film, the silicon-base film, the first silicon nitride film, and the second silicon nitride film.

24. A method for manufacturing a semiconductor integrated circuit device according to claim 23 , wherein the composition of germanium in the silicon-base film is 5% to about 50%.

25. A method for manufacturing a semiconductor integrated circuit device according to claim 23 , wherein the film forming temperature of the first silicon nitride film is about 480 degrees centigrade.

26. A method for manufacturing a semiconductor integrated circuit device according to claim 23 , wherein the film forming temperature of the second silicon nitride film is about 780 degrees centigrade.

27. A method for manufacturing a semiconductor integrated circuit device according to claim 23 , wherein the lamp annealing temperature of the first silicon nitride film is about 950 degrees centigrade.

Assignments (5)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
MERGER Recorded Aug 13, 2010
From: RENESAS TECHNOLOGY CORP.
To: NEC ELECTRONICS CORPORATION
Reel/Frame 024879/0190 →
CHANGE OF NAME Recorded Aug 13, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024864/0635 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2004
From: HITACHI, LTD.
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 014478/0407 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 20, 2003
From: YAMAMOTO, NAOKI; UCHIYAMA, HIROYUKI; SUZUKI, NORIO; NISHITANI, EISUKE; KIMURA, SHIN'ICHIRO; HOZAWA, KAZUYUKI
To: HITACHI, LTD.
Reel/Frame 014606/0813 →
Priority Claims (1)
JP 2001-69514 · Mar 12, 2001 · national
Continuity (1)
Related Publication 20040063276A1 · Apr 1, 2004