IP Library Granted Patent US 7,372,112
Granted Patent B2
US 7,372,112 · App. 10/550,643 · Granted May 13, 2008

Semiconductor device, process for producing the same and process for producing metal compound thin film

Assignees: Rohm Co., Ltd.; Renesas Technology Corp.; Horiba, Ltd.
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Quick Facts
Patent No.
US 7,372,112
App. No.
10/550,643
Granted
May 13, 2008
Kind
B2
Abstract

A high dielectric gate insulating film having the structure that a high-nitrogen layer, a low-nitrogen layer, and a high-nitrogen layer are layered in this order from a silicon-substrate side.

Claims (21)

1. A semiconductor device comprising:

a semiconductor substrate;

a gate insulating film formed on the semiconductor substrate; and

a gate electrode formed on the gate insulating film, wherein

the gate insulating film is a layered film including:

a first metal compound layer containing a metal compound expressed by the chemical formula M 1 O x N 1-x ;

a second metal compound layer formed on the first metal compound layer, containing a metal compound expressed by the chemical formula M 2 O y N 1-y ; and

a third metal compound layer formed on the second metal compound layer, containing a metal compound expressed by the chemical formula M 3 O z N 1-z , where 1≧y>x≧0, 1≧y>z≧0, and M 1 , M 2 , and M 3 each independently represent an element selected from the group consisting of Hf, Zr, La, Al, Si, and Y, and

C 1 and C 3 both reach or exceed 3×10 20 atom/cm 3 , where C 1 is a maximum nitrogen concentration in the first metal compound layer, and C 3 is a maximum nitrogen concentration in the third metal compound layer.

2. The semiconductor device according to claim 1 , wherein:

1>y>x>0 and 1>y>z>0 hold; and

each of the first, second, and third metal compound layers is one selected from the group consisting of a metal oxynitride layer and a metal nitride layer.

3. The semiconductor device according to claim 1 , wherein the layered film is formed by atomic layer deposition.

4. A semiconductor device comprising:

a semiconductor substrate;

a gate insulating film formed on the semiconductor substrate; and

a gate electrode formed on the gate insulating film, wherein

the gate insulating film includes a layered film including layers expressed by the following respective formulas:

M r M′ 1-r O u N 1-u , and

M s M′ 1-s O v N 1-v ,

where 1>r>0, 1>s>0, 1≧u≧0, 1≧v≧0, and u and v are different values, and M and M′ represent different elements each selected from the group consisting of Hf, Zr, La, Al, Si, and Y.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 27, 2012
From: RENESAS ELECTRONICS CORPORATION
To: ROHM CO., LTD.
Reel/Frame 028451/0572 →
CHANGE OF NAME Recorded Jun 27, 2012
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 028451/0959 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 11, 2010
From: HORIBA LTD
To: ROHM CO., LTD.
Reel/Frame 025349/0694 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 20, 2007
From: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
To: ROHM CO., LTD.; RENESAS TECHNOLOGY CORP.; HORIBA, LTD.
Reel/Frame 019852/0511 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 23, 2005
From: IWAMOTO, KUNIHIKO; NABATAME, TOSHIHIDE; TOMINAGA, KOJI; YASUDA, TETSUJI
To: ROHM CO., LTD.; RENESAS TECHNOLOGY CORP.; HORIBA, LTD.; NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
Reel/Frame 017860/0450 →
Priority Claims (1)
JP 2003-083687 · Mar 25, 2003 · national
Continuity (1)
Related Publication 20060180877A1 · Aug 17, 2006