IP Library Granted Patent US 7,786,805
Granted Patent B2
US 7,786,805 · App. 10/596,366 · Granted Aug 31, 2010

Power amplifier module and a time division multiple access radio

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Quick Facts
Patent No.
US 7,786,805
App. No.
10/596,366
Granted
Aug 31, 2010
Kind
B2
Abstract

A power amplifier module comprises a power amplifier circuit having an output power level controlled by a power supply voltage. A power supply transistor controls the power supply to the power amplifier circuit from a drive signal which is received from a drive circuit. The drive circuit generates the drive signal in response to a power level input signal, which specifically may correspond to a power ramping for a GSM cellular communication system. The power amplifier module furthermore comprises a detection circuit which determines an operating characteristic of the power supply transistor. The operating characteristic is preferably a saturation characteristic. A control circuit controls the drive signal in response to the operating characteristic. The control circuit preferably controls the drive signal such that the power supply transistor does not enter the linear region for a Field Effect Transistor and the saturated region for a bipolar transistor.

Claims (71)

1. A power amplifier module, comprising

a power amplifier circuit having a power supply regulated output power level;

a power supply transistor coupled to the power amplifier circuit and operable to control a power supply to the power amplifier circuit in response to a drive signal, wherein the power supply transistor is a Field Effect Transistor;

a drive circuit coupled to the power supply transistor and operable to generate the drive signal in response to a power level input signal;

a detection circuit for determining an operating characteristic of the power supply transistor; and

a control circuit coupled to the drive circuit and operable to control the drive signal in response to the operating characteristic;

wherein the control circuit is operable to control the drive signal to substantially prevent the power supply transistor from entering a FET linear region operating state; and the detection circuit comprises a sense transistor operable to detect a drain- gate voltage of the power supply transistor; the sense transistor conducting current if the power supply transistor enters a FET linear region of operation and if a drain-source voltage of the power supply transistor is below a gate-source voltage minus a threshold voltage of the power supply transistor; and the control circuit is operable to control the drive signal in response to the current.

2. A power amplifier module, comprising;

a power amplifier circuit having a power supply regulated output power level;

a power supply transistor coupled to the power amplifier circuit and operable to control a power supply to the power amplifier circuit in response to a drive signal, wherein the power supply transistor is a Field Effect Transistor;

a drive circuit coupled to the power supply transistor and operable to generate the drive signal in response to a power level input signal;

a detection circuit for determining an operating characteristic of the power supply transistor;

a control circuit coupled to the drive circuit and operable to control the drive signal in response to the operating characteristic,

wherein the detection circuit comprises a sense transistor operable to detect a drain- gate voltage of the power supply transistor and to conduct a current if the power supply transistor enters a FET linear region of operation; and

the control circuit is operable to control the drive signal in response to the current and to control the drive signal to substantially prevent the power supply transistor from entering a FET linear region operating state and to reduce an absolute amplitude of the drive signal in response to the sense transistor conducting the current.

3. A power amplifier module, comprising;

a power amplifier circuit having a power supply regulated output power level;

a power supply transistor coupled to the power amplifier circuit and operable to control a power supply to the power amplifier circuit in response to a drive signal, wherein the power supply transistor is a Field Effect Transistor;

a drive circuit coupled to the power supply transistor and operable to generate the drive signal in response to a power level input signal;

a detection circuit for determining an operating characteristic of the power supply transistor; and

a control circuit coupled to the drive circuit and operable to control the drive signal in response to the operating characteristic,

wherein the detection circuit comprises a sense transistor operable to detect a drain-gate voltage of the power supply transistor and to conduct a current if the power supply transistor enters a FET linear region of operation and wherein a gate of the sense transistor is connected to a gate of the power supply transistor and a source of the sense transistor is connected to a drain of the power supply transistor; and

wherein the control circuit is operable to control the drive signal in response to the current and to control the drive signal to substantially prevent the power supply transistor from entering a FET linear region operating state.

4. A power amplifier module, comprising:

a power amplifier circuit having a power supply regulated output power level;

a power supply transistor coupled to the power amplifier circuit and operable to control a power supply to the power amplifier circuit in response to a drive signal, wherein the power supply transistor is a Field Effect Transistor;

a drive circuit coupled to the power supply transistor and operable to generate the drive signal in response to a power level input signal;

a detection circuit for determining an operating characteristic of the power supply transistor; and

a control circuit coupled to the drive circuit and operable to control the drive signal in response to the operating characteristic,

wherein the control circuit is operable to control the drive signal to substantially prevent the power supply transistor from entering a FET linear region operating state and the detection circuit comprises a sense transistor operable to detect a drain- gate voltage of the power supply transistor, which sense transistor has a threshold voltage similar to the threshold voltage of the power supply transistor.

5. A power amplifier module, comprising;

a power amplifier circuit having a power supply regulated output power level;

a power supply transistor coupled to the power amplifier circuit and operable to control a power supply to the power amplifier circuit in response to a drive signal, wherein the power supply transistor is a Field Effect Transistor;

a drive circuit coupled to the power supply transistor and operable to generate the drive signal in response to a power level input signal;

a detection circuit for determining an operating characteristic of the power supply transistor; and

a control circuit coupled to the drive circuit and operable to control the drive signal in response to the operating characteristic,

wherein the control circuit is operable to control the drive signal to substantially prevent the power supply transistor from entering a FET linear region operating state; and the detection circuit comprises a sense transistor operable to detect a drain-gate voltage of the power supply transistor; and

wherein the control circuit comprises an output transistor coupled to the sense transistor and to a signal junction in the drive circuit such that if the sense transistor conducts current, the output transistor becomes active and causes a signal level at the signal point to be reduced.

6. A power amplifier module as claimed in claim 5 , wherein the sense transistor is connected to a first input of a current image circuit and the output transistor is connected to a second input of the current image circuit.

7. A power amplifier module as claimed in claim 3 , wherein a supply voltage for the power supply transistor is a variable voltage.

8. A power amplifier module as claimed in claim 2 , wherein the sense transistor conducts current if a drain-source voltage of the power supply transistor is below a gate-source voltage minus a threshold voltage of the power supply transistor.

9. A power amplifier module as claimed in claim 4 , wherein the sense transistor is operable to conduct a current if the power supply transistor enters a FET linear region of operation and the control circuit is operable to control the drive signal in response to the current and wherein the sense transistor conducts current if a drain-source voltage of the power supply transistor is below a gate-source voltage minus a threshold voltage of the power supply transistor.

10. A power amplifier module as claimed in claim 3 , wherein the control circuit is operable to reduce an absolute amplitude of the drive signal in response to the sense transistor conducting the current.

11. A power amplifier module as claimed in claim 4 , wherein the sense transistor is operable to conduct a current if the power supply transistor enters a FET linear region of operation and the control circuit is operable to control the drive signal in response to the current and wherein a gate of the sense transistor is connected to a gate of the power supply transistor and a source of the sense transistor is connected to a drain of the power supply transistor.

12. A power amplifier module as claimed in claim 4 , wherein the sense transistor is operable to conduct a current if the power supply transistor enters a FET linear region of operation and the control circuit is operable to control the drive signal in response to the current;

and wherein a gate of the sense transistor is connected to a gate of the power supply transistor and a source of the sense transistor is connected to a drain of the power supply transistor.

13. A power amplifier module as claimed in claim 5 , wherein the control circuit comprises an output transistor coupled to the sense transistor and to a signal junction in the drive circuit such that if the sense transistor conducts current, the output transistor becomes active and causes a signal level at the signal point to be reduced.

14. A power amplifier module as claimed in claim 3 , wherein the sense transistor conducts current if a drain-source voltage of the power supply transistor is below a gate-source voltage minus a threshold voltage of the power supply transistor.

15. A power amplifier module as claimed in claim 5 , wherein the sense transistor is operable to conduct a current if the power supply transistor enters a FET linear region of operation and the control circuit is operable to control the drive signal in response to the current and wherein the sense transistor conducts current if a drain-source voltage of the power supply transistor is below a gate-source voltage minus a threshold voltage of the power supply transistor.

16. A power amplifier module as claimed in claim 5 , wherein the sense transistor is operable to conduct a current if the power supply transistor enters a FET linear region of operation and the control circuit is operable to control the drive signal in response to the current and wherein a gate of the sense transistor is connected to a gate of the power supply transistor and a source of the sense transistor is connected to a drain of the power supply transistor.

17. A power amplifier module as claimed in claim 5 , wherein the sense transistor is operable to conduct a current if the power supply transistor enters a FET linear region of operation and the control circuit is operable to control the drive signal in response to the current;

and wherein a gate of the sense transistor is connected to a gate of the power supply transistor and a source of the sense transistor is connected to a drain of the power supply transistor.

18. A power amplifier circuit having a power supply regulated output power level;

a power supply transistor coupled to the power amplifier circuit and operable to control a power supply to the power amplifier circuit in response to a drive signal;

a drive circuit coupled to the power supply transistor and operable to generate the drive signal in response to a power level input signal;

a detection circuit for determining an operating characteristic of the power supply transistor; and

a control circuit coupled to the drive circuit and operable to control the drive signal in response to the operating characteristic,

wherein the detection circuit comprises a sense transistor operable to detect a collector-base voltage or a source-gate voltage of the power supply transistor, and the sense transistor is operable to conduct a current if the power supply transistor enters a linear region of operation and the control circuit is operable to control the drive signal in response to the current and to reduce an absolute amplitude of the drive signal in response to the sense transistor conducting the current.

19. A power amplifier circuit having a power supply regulated output power level;

a power supply transistor coupled to the power amplifier circuit and operable to control a power supply to the power amplifier circuit in response to a drive signal;

a drive circuit coupled to the power supply transistor and operable to generate the drive signal in response to a power level input signal;

a detection circuit for determining an operating characteristic of the power supply transistor; and

a control circuit coupled to the drive circuit and operable to control the drive signal in response to the operating characteristic;

wherein the detection circuit comprises a sense transistor operable to detect a collector-base voltage or a source-gate voltage of the power supply transistor, and wherein the sense transistor has a threshold voltage similar to a threshold voltage of the power supply transistor.

20. A power amplifier circuit having a power supply regulated output power level;

a power supply transistor coupled to the power amplifier circuit and operable to control a power supply to the power amplifier circuit in response to a drive signal;

a drive circuit coupled to the power supply transistor and operable to generate the drive signal in response to a power level input signal;

a detection circuit for determining an operating characteristic of the power supply transistor; and

a control circuit coupled to the drive circuit and operable to control the drive signal in response to the operating characteristic,

wherein the detection circuit comprises a sense transistor operable to detect a collector-base voltage or a source-gate voltage of the power supply transistor, and

wherein the control circuit comprises an output transistor coupled to the sense transistor and to a signal junction in the drive circuit such that if the sense transistor conducts current, the output transistor becomes active and causes a signal level at the signal point to be reduced.

Assignments (26)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
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RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
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CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
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To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
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CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
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CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
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RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
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To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
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