Methods and systems for fabricating electrical connections to semiconductor structures incorporating low-k dielectric materials
View Patent ↗Low-k dielectric materials have desirable insulating characteristics for use in insulating sub micron conductors in semiconductor devices. However, certain physical and material characteristics of the low-k dielectric materials make them difficult to work with. More particularly, the soft, porous, leakage-prone characteristics of low-k materials makes it difficult to accommodate electrical contacts for electrical probing to conductors covered by such materials. The present invention provides methods and structures for facilitating the electrical probing of semiconductor device conductors insulated by overlying low-k layers of dielectric material.
1. A semiconductor structure comprising:
a buried semiconductor device;
a first conductor overlying said semiconductor device and to said semiconductor device;
a low-k dielectric layer surrounding said first conductor;
a low-k dielectric cap overlying said first conductor;
a high-k insulator layer deposited over said low-k dielectric cap;
a via through said high-k insulator layer and said low-k dielectric cap exposing a surface of said first conductor;
a passivating film of high-k dielectric insulator over the wall of said via; and
a second conductor extending through said via over said passivating film to contact said first conductor.
2. A semiconductor structure comprising:
a silicon over-insulator semiconductor structure;
a buried semiconductor device formed in said silicon-over-insulator structure;
a first metal conductor overlying said semiconductor device and connected to said semiconductor device;
a low-k dielectric layer surrounding said first metal conductor;
a low-k dielectric cap overlying said first metal conductor;
a high-k insulator layer over said low-k dielectric cap;
a via through said high-k insulator layer and said low-k dielectric cap exposing a surface of said first metal conductor;
a passivating film of high-k dielectric insulator over the wall of said via; and
a second metal conductor extending through said via over said passivating film to contact said first metal conductor.
3. The semiconductor structure of claim 2 wherein said first metal conductor includes a sub micron dimension.
4. The semiconductor structure of claim 2 wherein said via has a diameter in the range of about 0.10-0.20 microns.