Multi-electron beam exposure method and apparatus
View Patent ↗The dimension of the main field as a unit region for exposure is set to an integral submultiple of the arrangement pitch of the LSI to be exposed, by the control computer 62 , and the exposure data stored in the form associated with electron beams from a data generation circuit 64 is limited to one-chip data alone in units of a stripe. This data is repeatedly read out to write the stripe. Further, a storage circuit 66 is provided to store the exposure data by means of a double buffer memory unit for each electron beam. While LSI is written according to one of the buffers, the next exposure stripe data is prepared on the other buffer, thereby bringing about a substantial reduction in the required speed of the exposure data generation circuit.
1. A multi-electron beam exposure method, wherein multiple electron beams are applied to a sample surface mounted on a traveling sample stage to perform repeated exposure of chip patterns wherein the method comprises the steps of:
in a case that the sample surface is represented in an X-Y coordinate system, a continuous traveling direction of a sample stage is assumed as a Y-axis direction, and the sample surface has a plurality of chips of the same kind located in a line at equal intervals respectively in the X and Y directions which are exposed;
partitioning an exposure region of the sample surface into multiple stripe regions having a width in the X-axis direction;
further partitioning each of the multiple stripe regions into multiple main fields having a width in the Y-axis direction;
setting at least one of the widths of the main fields in the X- and Y-axis directions to an integral submultiple of the chip size;
storing exposure pattern data for one chip based on the partitioned main fields as a unit; and
reading out the stored exposure pattern data a number of times corresponding to the number of the chips repeatedly;
wherein each electron beam provides repeated exposure of same regions of the chips.
2. A multi-electron beam exposure method according to claim 1 , wherein the Y-axis direction is partitioned in conformity to chip width, and a stripe subregion is repeatedly exposed according to the partitioned bit map data.
3. A multi-electron beam exposure method according to claim 1 , wherein while one of the stripe regions is exposed, the bit map data of a next stripe region is generated and saved.
4. A multi-electron beam exposure method according to claim 1 , wherein the width of said main fields in the X-axis direction is set to an integral submultiple of the chip size in the X-axis direction; and
each electron beam provides repeated exposure of some regions of said chips in the X-axis direction.
5. A multi-electron beam exposure method according to claim 1 , wherein the width of said main fields in the Y-axis direction is set to an integral submultiple of the chip size in the Y-axis direction; and
each electron beam provides repeated exposure of the same regions of said chips in the Y-axis direction.
6. A multi-electron beam exposure apparatus comprising:
a deflector for deflecting multiple electron beams as one integral one and blanking means far providing independent control of application of said electron beams to a sample;
a pattern generation unit for expanding compressed pattern data and generating bit map data;
a storage unit for storing the generated bit map data in a form associated with said electron beams; and
an exposure control unit for controlling said blanking mean based on the stored bit map data;
wherein the storage unit consists of a double buffer memory unit that stores the bit map data in a next exposure unit region generated by the pattern generation unit, while the bit map data in the stored exposure unit region is repeatedly read out by the exposure control unit;
in a case that the sample surface is represented in an X-Y coordinate system, a continuous traveling direction of a sample stage is assumed as a Y- axis direction, and the sample surface has a plurality of chips of the same kind located in a line at equal intervals respectively in the X and Y directions which are exposed;
an exposure region of the sample surface is partitioned into multiple stripe regions having a width in the X-axis direction;
each of the multiple stripe regions is further partitioned into multiple main fields having a width in the Y-axis direction;
at least one of the widths of the main fields in the X- and Y-axis directions is set to an integral submultiple of the chip size;
exposure pattern data for one chip are stored based on the partitioned main fields as a unit;
the stored exposure pattern data are readout a number of times corresponding to the number of the chips repeatedly; and
each electron beam provides repeated exposure of the same regions of said chips.
7. A multi-electron beam exposure apparatus according to claim 6 , wherein the bit map data of the exposure unit is the bit map data in the chip stripe regions obtained by partitioning a repeatedly exposed pattern by a width in a main deflector.
8. A multi-electron beam exposure apparatus according to claim 7 , wherein the generation unit for generating said bit map data contains a correction unit for correcting distortion of a second deflector for deflecting electron beams.
9. A multi-electron beam exposure apparatus according to claim 6 , wherein the pattern generation unit for generating the bit map data contains a correction unit for correcting distortion of the second means for deflecting electron beams.