IP Library Granted Patent US 6,853,174
Granted Patent B1
US 6,853,174 · App. 10/639,066 · Granted Feb 8, 2005

Selective high-side and low-side current sensing in switching power supplies

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Quick Facts
Patent No.
US 6,853,174
App. No.
10/639,066
Granted
Feb 8, 2005
Kind
B1
Abstract

A current mode switching regulator implementing a dual sense scheme includes a first current sensing circuit for sensing a current through a first switch and providing a first current sense signal, and a second current sensing circuit for sensing a current through a second switch and providing a second current sense signal. The switching regulator includes a control circuit for generating switch control signals for driving the first and second switches in response to one of the first and second current sense signals. The regulator further includes a duty cycle detection circuit coupled to determine a duty cycle of the switching regulator. The detection circuit asserts a first select signal to select the first current sense signal when the duty cycle exceeds a first threshold level and asserts a second select signal to select the second current sense signal when the duty cycle is less than a second threshold level.

Claims (90)

1. A current mode switching regulator including a first switch and a second switch coupled to drive a switch output node for generating a switch output voltage which switch output voltage is used to generate a regulated output voltage having a substantially constant magnitude, the switching regulator comprising:

a first current sensing circuit for sensing a current through the first switch and providing a first current sense signal;

a second current sensing circuit for sensing a current through the second switch and providing a second current sense signal;

a control circuit for generating a first switch control signal and a second switch control signal for driving the first switch and the second switch respectively for generating the switch output voltage so as to maintain the regulated output voltage at a substantially constant magnitude, the control circuit generating the switch control signals in response to a selected one of the first and second current sense signals; and

a duty cycle detection circuit coupled to determine a duty cycle of the switching regulator, the duty cycle detection circuit asserting a first select signal when the duty cycle exceeds a first threshold level and asserting a second select signal when the duty cycle is less than a second threshold level, the first threshold level being greater than the second threshold level;

wherein the control circuit selects the first current sense signal when the first select signal is asserted and the control circuit selects the second current sense signal when the second select signal is asserted.

2. The switching regulator of claim 1 , further comprising:

an output filter circuit coupled to the switch output node for receiving the switch output voltage and generating the regulated output voltage,

wherein the first switch is turned on to cause a current into the output filter circuit to increase while the second switch is turned on to cause the current into the output filter circuit to decrease.

3. The switching regulator of claim 2 , wherein the duty cycle is indicative of the amount of time within a clock period the first switch is turned on.

4. The switching regulator of claim 3 , wherein the duty cycle detection circuit determines the duty cycle of the switching regulator by monitoring the first switch control signal.

5. The switching regulator of claim 4 , wherein the duty cycle detection circuit comprises:

a low pass filter coupled to receive the first switch control signal and providing a filtered signal;

a first comparator receiving the filtered signal and the first threshold level, the first comparator generating the first select signal; and

a second comparator receiving the filtered signal and the second threshold level, the second comparator generating the second select signal.

6. The switching regulator of claim 5 , wherein the first switch control signal is generated by a driver circuit coupled to the control circuit, the driver circuit being powered by a drive supply voltage, and the duty cycle detection circuit further comprises a resistor divider network coupled between the drive supply voltage and a ground voltage, the resistor divider network dividing the drive supply voltages and providing the first threshold level and the second threshold level.

7. The switching regulator of claim 6 , wherein the resistor divider network comprises a first resistor, a second resistor and a third resistor connected in series between the drive supply voltage and the ground voltage, the first, second and third resistors having equal resistance, the first threshold level being provided between the first and second resistors and the second threshold level being provided between the second and third resistors.

8. A current mode switching regulator, comprising:

a first switch and a second switch connected in series between a first voltage and a second voltage, a switch output node between the first switch and the second switch providing a switch output voltage for use in generating a regulated output voltage;

a first current sensing circuit for sensing a current through the first switch and providing a first current sense signal;

a second current sensing circuit for sensing a current through the second switch and providing a second current sense signal;

a control circuit receiving an error voltage, the first and second current sense signals and a system clock as input signals, the control circuit generating a control signal in response to the error voltage and a selected one of the current sense signals, wherein the error voltage is indicative of the difference between a voltage corresponding to the regulated output voltage and a reference voltage;

a driver circuit coupled to the control circuit for receiving the control signal, the driver circuit generating a first switch control signal and a second switch control signal for driving the first switch and the second switch respectively in response to the control signal; and

a duty cycle detection circuit coupled to determine a duty cycle of the switching regulator, the duty cycle detection circuit asserting a first select signal when the duty cycle exceeds a first threshold level and asserting a second select signal when the duty cycle is less than a second threshold level, the first threshold level being greater than the second threshold level;

wherein the control circuit selects the first current sense signal when the first select signal is asserted and the control circuit selects the second current sense signal when the second select signal is asserted.

9. The switching regulator of claim 8 , further comprising

an error amplifier having a first input node coupled to receive the voltage corresponding to the regulated output voltage, a second input terminal coupled to a reference voltage, and an output node providing the error voltage indicative of the difference between the feedback voltage and the reference voltage.

10. The switching regulator of claim 9 wherein the voltage corresponding to the regulated output voltage comprises a divided-down voltage of the regulated output voltage.

11. The switching regulator of claim 8 , further comprising:

an output filter circuit coupled to the switch output node for receiving the switch output voltage and generating the regulated output voltage.

12. The switching regulator of claim 11 , wherein the output filter circuit comprises an inductor coupled between the switch output node and an output terminal and a capacitor coupled between the output terminal and the second voltage, the regulated output voltage being provided at the output terminal; and wherein the current in the inductor increases when the first switch is turned on and the current in the inductor decreases when the second switch is turned on.

13. The switching regulator of claim 8 , wherein the duty cycle detection circuit determines the duty cycle of the switching regulator by monitoring the first switch control signal.

14. The switching regulator of claim 13 , wherein the duty cycle detection circuit comprises:

a low pass filter coupled to receive the first switch control signal and providing a filtered signal;

a first comparator receiving the filtered signal and the first threshold level, the first comparator generating the first select signal; and

a second comparator receiving the filtered signal and the second threshold level, the second comparator generating the second select signal.

15. The switching regulator of claim 14 , wherein the driver circuit is powered by a drive supply voltage, and the duty cycle detection circuit further comprises a resistor divider network coupled between the drive supply voltage and a ground voltage, the resistor divider network dividing the drive supply voltages and providing the first threshold level and the second threshold level.

16. The switching regulator of claim 15 , wherein the resistor divider network comprises a first resistor, a second resistor and a third resistor connected in series between the drive supply voltage and the ground voltage, the first, second and third resistors having equal resistance, the first threshold level being provided between the first and second resistors and the second threshold level being provided between the second and third resistors.

17. The switching regulator of claim 8 , wherein the first voltage comprises an input voltage of the switching regulator and the second voltage comprises a ground voltage.

18. A current mode switching regulator, comprising:

a first switch and a second switch connected in series between an output terminal and a second voltage, a switch output node between the first switch and the second switch providing a switch output voltage for generating a regulated output voltage at the output terminal;

a filter circuit including an inductor coupled between a first voltage and the switch output node and a capacitor coupled between the output terminal and the second voltage;

a first current sensing circuit for sensing a current through the first switch and providing a first current sense signal;

a second current sensing circuit for sensing a current through the second switch and providing a second current sense signal;

a control circuit receiving an error voltage, the first and second current sense signals and a system clock as input signals, the control circuit generating a control signal in response to the error voltage and a selected one of the current sense signals, wherein the error voltage is indicative of the difference between a voltage corresponding to the regulated output voltage and a reference voltage;

a driver circuit coupled to the control circuit for receiving the control signal, the driver circuit generating a first switch control signal and a second switch control signal for driving the first switch and the second switch respectively in response to the control signal; and

a duty cycle detection circuit coupled to determine a duty cycle of the switching regulator, the duty cycle detection circuit asserting a first select signal when the duty cycle exceeds a first threshold level and asserting a second select signal when the duty cycle is less than a second threshold level, the first threshold level being greater than the second threshold level;

wherein the control circuit selects the second current sense signal when the first select signal is asserted and the control circuit selects the first current sense signal when the second select signal is asserted.

19. The switching regulator of claim 18 , further comprising

an error amplifier having a first input node coupled to receive the voltage corresponding to the regulated output voltage, a second input terminal coupled to a reference voltage, and an output node providing the error voltage indicative of the difference between the feedback voltage and the reference voltage.

20. The switching regulator of claim 19 wherein the voltage corresponding to the regulated output voltage comprises a divided-down voltage of the regulated output voltage.

21. The switching regulator of claim 18 , wherein the current in the inductor increases when the second switch is turned on and the current in the inductor decreases when the first switch is turned on.

22. The switching regulator of claim 18 , wherein the duty cycle detection circuit determines the duty cycle of the switching regulator by monitoring the first switch control signal.

23. The switching regulator of claim 22 , wherein the duty cycle detection circuit comprises:

a low pass filter coupled to receive the first switch control signal and providing a filtered signal;

a first comparator receiving the filtered signal and the first threshold level, the first comparator generating the first select signal; and

a second comparator receiving the filtered signal and the second threshold level, the second comparator generating the second select signal.

24. The switching regulator of claim 14 , wherein the driver circuit is powered by a drive supply voltage, and the duty cycle detection circuit further comprises a resistor divider network coupled between the drive supply voltage and a ground voltage, the resistor divider network dividing the drive supply voltages and providing the first threshold level and the second threshold level.

25. A current mode switching regulator including a first switch and a second switch coupled to drive a switch output node for generating a switch output voltage and a filter circuit coupled to the switch output node for generating a regulated output voltage having a substantially constant magnitude, the switching regulator comprising:

a current sensing circuit for sensing a current through the filter circuit and providing a current sense signal, the current being sensed at a first phase where the current is increasing or a second phase where the current is decreasing;

a control circuit for generating a first switch control signal and a second switch control signal for driving the first switch and the second switch respectively for generating the switch output voltage so as to maintain the regulated output voltage at a substantially constant magnitude, the control circuit generating the switch control signals in response to the current sense signal; and

a duty cycle detection circuit coupled to determine a duty cycle of the switching regulator, the duty cycle detection circuit asserting a first select signal when the duty cycle exceeds a first threshold level and asserting a second select signal when the duty cycle is less than a second threshold level, the first threshold level being greater than the second threshold level;

wherein the control circuit selects the current sense signal being measured during the first phase when the first select signal is asserted and the control circuit selects the current sense signal being measured during the second phase when the second select signal is asserted.

26. The switching regulator of claim 25 , wherein the first switch is turned on to cause the current into the output filter circuit to increase while the second switch is turned on to cause the current into the output filter circuit to decrease.

27. The switching regulator of claim 26 , wherein the duty cycle is indicative of the amount of time within a clock period the first switch is turned on.

28. The switching regulator of claim 27 , wherein the duty cycle detection circuit determines the duty cycle of the switching regulator by monitoring the first switch control signal.

29. The switching regulator of claim 28 , wherein the duty cycle detection circuit comprises:

a low pass filter coupled to receive the first switch control signal and providing a filtered signal;

a first comparator receiving the filtered signal and the first threshold level, the first comparator generating the first select signal; and

a second comparator receiving the filtered signal and the second threshold level, the second comparator generating the second select signal.

30. The switching regulator of claim 29 , wherein the first switch control signal is generated by a driver circuit coupled to the control circuit, the driver circuit being powered by a drive supply voltage, and the duty cycle detection circuit further comprises a resistor divider network coupled between the drive supply voltage and a ground voltage, the resistor divider network dividing the drive supply voltages and providing the first threshold level and the second threshold level.

31. The switching regulator of claim 30 , wherein the resistor divider network comprises a first resistor, a second resistor and a third resistor connected in series between the drive supply voltage and the ground voltage, the first, second and third resistors having equal resistance, the first threshold level being provided between the first and second resistors and the second threshold level being provided between the second and third resistors.

32. A method in a current mode switching regulator, the switching regulator including a first switch and a second switch coupled to drive a switch output node for generating a switch output voltage which switch output voltage is used to generate a regulated output voltage having a substantially constant magnitude, comprising:

sensing a current through the first switch and providing a first current sense signal;

sensing a current though the second switch and providing a second current sense signal;

generating a first switch control signal and a second switch control signal for driving the first switch and the second switch respectively to generate the switch output voltage so as to maintain the regulated output voltage at a substantially constant magnitude, the first switch control signal and the second control signal being generated in response to an error voltage and a selected one of the first and second current sense signals, the error voltage being indicative of the difference between a voltage corresponding to the regulated output voltage and a reference voltage,

monitoring a duty cycle of the switching regulator;

comparing the duty cycle to a first threshold level and a second threshold level, the first threshold level being greater than the second threshold level;

asserting a first select signal when the duty cycle exceeds the first threshold level; and

asserting a second select signal when the duty cycle is less than the second threshold level,

wherein the first select signal is asserted to select the first current sense signal and the second select signal is asserted to select the second current sense signal.

33. The method of claim 32 , wherein the switching regulator further includes an output filter circuit coupled to the switch output node for receiving the switch output voltage and generating the regulated output voltage and wherein the first switch is turned on to cause a current into the output filter circuit to increase while the second switch is turned on to cause the current into the output filter circuit to decrease.

34. The method of claim 33 , wherein the duty cycle is indicative of the amount of time within a clock period the first switch is turned on.

35. The method of claim 34 , wherein monitoring a duty cycle of the switching regulator comprises monitoring the first switch control signal.

36. The method of claim 35 , wherein monitoring a duty cycle of the switching regulator comprises:

low-pass filtering the first switch control signal;

comparing the filtered signal to the first threshold level;

generating a first select signal when the filtered signal is greater than the first threshold level;

comparing the filtered signal to the second threshold level; and

generating a second select signal when the filtered signal is less than the second threshold level.

Assignments (11)
INTELLECTUAL PROPERTY BUY-IN AGREEMENT/ASSIGNMENT Recorded Apr 4, 2023
From: MICREL LLC
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 063241/0771 →
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNMENT DOCUMENTS STATE OF INCORPORATION. DOCUMENT PREVIOUSLY RECORDED AT REEL 014392 FRAME 0022. Recorded Aug 19, 2004
From: INN, BRUCE L.
To: MICREL, INC.
Reel/Frame 015075/0779 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 11, 2003
From: INN, BRUCE L.
To: MICREL INC
Reel/Frame 014392/0022 →