Ball grid array package and process for manufacturing same
View Patent ↗A process for manufacturing an integrated circuit package includes forming a plurality of solder balls on a first surface of a substrate and mounting a semiconductor die to the substrate such that bumps of the semiconductor die are electrically connected to conductive traces of the substrate. The semiconductor die and the solder balls are encapsulated in an overmold material on the substrate such that portions of the solder balls are exposed. A ball grid array is formed such that bumps of the ball grid array are electrically connected to the conductive traces and the integrated circuit package is singulated.
1. An integrated circuit package comprising: a substrate having a plurality of conductive traces; a plurality of balls disposed on a first surface of said substrate, such that said plurality of balls are electrically connected to said plurality of conductive traces; a semiconductor die mounted to said substrate, such that said semiconductor die is electrically connected to said plurality of conductive traces of said substrate; an overmold material encapsulating said semiconductor die and said balls on said substrate such that portions of said balls that are disposed farthest from said substrate are exposed at an exterior of said integrated circuit package; a ball grid array disposed on a second surface of said substrate and in electrical connection with said conductive traces; and a die adapter mounted on said semiconductor die and encapsulated in said overmold material.
2. The integrated circuit package according to claim 1 , wherein said plurality of balls is attached to respective solder ball pads on said first surface of said substrate.
3. The integrated circuit package according to claim 1 , wherein said bumps of said semiconductor die are electrically connected to said conductive traces by wire bonds.
4. The integrated circuit package according to claim 1 , wherein said semiconductor die is fixed to said first surface of said substrate.
5. The integrated circuit package according to claim 1 , wherein said plurality of balls circumscribe said semiconductor die.
6. The integrated circuit package according to claim 1 , wherein said balls are deformed.
7. The integrated circuit package according to claim 1 , wherein said plurality of balls is comprised of a plurality of solder balls.
8. The integrated circuit package according to claim 1 , wherein the semiconductor die is mounted to said substrate via a plurality of solder ball connections.