IP Library Granted Patent US 6,888,209
Granted Patent B2
US 6,888,209 · App. 10/663,043 · Granted May 3, 2005

Semiconductor package and method of fabricating the same

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Quick Facts
Patent No.
US 6,888,209
App. No.
10/663,043
Granted
May 3, 2005
Kind
B2
Abstract

A semiconductor package includes a semiconductor substrate having a device region on one surface thereof, and a connecting pad electrically connected to the device region. A support substrate is formed on a side of one surface of the semiconductor substrate. An external electrode formed on a side of the other surface of the semiconductor substrate. A connecting wire is partially extended outside the semiconductor substrate for electrically connecting the connecting pad and external electrode.

Claims (24)

1. A semiconductor package comprising:

a semiconductor substrate including a device region on a first surface thereof, and a connecting pad electrically connected to the device region;

a connecting wire which is formed on a side of the first surface of the semiconductor substrate and which includes a first end electrically connected to the connecting pad and a second end extending outside of the semiconductor substrate;

an insulating film formed on the second surface of the semiconductor substrate and the connecting wire and having a hole at a position corresponding to the second end of the connecting wire;

a support substrate formed on the side of the first surface of the semiconductor substrate so as to support the semiconductor substrate;

an external electrode formed on the insulating film; and

a distribution wire for electrically connecting the connecting wire and external electrode via the hole in the insulating film.

2. The package according to claim 1 , wherein the connecting wire comprises a metal plating layer.

3. The package according to claim 1 , wherein the connecting wire includes a portion in close contact with the first surface of the semiconductor substrate.

4. The package according to claim 1 , wherein the connecting wire is formed in close contact with the support substrate.

5. The package according to claim 1 , further comprising a projecting connecting electrode between the connecting pad and connecting wire.

6. The package according to claim 1 , wherein the external electrode comprises a columnar electrode, and a solder ball is formed on the columnar external electrode.

7. The package according to claim 6 , wherein an encapsulating film is formed around the columnar electrode on the insulating film.

8. The package according to claim 1 , wherein the device region comprises a photoelectric conversion device region.

9. The package according to claim 1 , wherein the support substrate comprises a glass substrate.

10. The package according to claim 9 , wherein one of a transparent adhesive layer and a transparent encapsulating layer is formed between the semiconductor substrate and glass substrate.

11. A semiconductor package comprising:

a semiconductor substrate including a device region on a first surface thereof, and a connecting pad electrically connected to the device region;

a support substrate formed on a side of the first surface of the semiconductor substrate;

an external electrode formed on a side of a second surface of the semiconductor substrate; and

connecting means, partially extended outside the semiconductor substrate, for electrically connecting the connecting pad and external electrode;

wherein the connecting means includes a distribution wire extended to the side of the second surface of the semiconductor substrate, and a connecting wire formed on a surface of the support substrate opposing the semiconductor substrate, wherein the connecting wire comprises a first end portion connected to the connecting pad, and a second end portion extended outside the semiconductor substrate, and

wherein a columnar electrode is formed on the second end portion of the connecting wire, and the distribution wire is connected to the columnar electrode.

12. The package according to claim 11 , wherein an insulating film is formed between the second surface of the semiconductor substrate and the distribution wire.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 27, 2017
From: TERA PROBE, INC.
To: AOI ELECTRONICS CO., LTD.
Reel/Frame 041521/0001 →
MERGER Recorded Jan 27, 2017
From: TERAMIKROS, INC.
To: TERA PROBE, INC.
Reel/Frame 041664/0471 →
CHANGE OF OWNERSHIP BY CORPORATE SEPARATION-TO CORRECT ASSIGNEE'S ADDRESS ON REEL 027465, FRAME 0812 Recorded Jan 6, 2012
From: CASIO COMPUTER CO., LTD.
To: TERAMIKROS, INC.
Reel/Frame 027492/0449 →
CHANGE OF OWNERSHIP BY CORPORATE SEPARATION Recorded Jan 3, 2012
From: CASIO COMPUTER CO., LTD.
To: TERAMIKROS, INC.
Reel/Frame 027465/0812 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 15, 2003
From: JOBETTO, HIROYASU
To: CASIO COMPUTER CO., LTD.
Reel/Frame 014516/0403 →