IP Library Granted Patent US 7,389,508
Granted Patent B2
US 7,389,508 · App. 10/670,833 · Granted Jun 17, 2008

System and method for grouping processors and assigning shared memory space to a group in heterogeneous computer environment

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Quick Facts
Patent No.
US 7,389,508
App. No.
10/670,833
Granted
Jun 17, 2008
Kind
B2
Abstract

A system and method for grouping processors is presented. A processing unit (PU) initiates an application and identifies the application's requirements. The PU assigns one or more synergistic processing units (SPUs) and a memory space to the application in the form of a group. The application specifies whether the task requires shared memory or private memory. Shared memory is a memory space that is accessible by the SPUs and the PU. Private memory, however, is a memory space that is only accessible by the SPUs that are included in the group. When the application executes, the resources within the group are allocated to the application's execution thread. Each group has its own group properties, such as address space, policies (i.e. real-time, FIFO, run-to-completion, etc.) and priority (i.e. low or high). These group properties are used during thread execution to determine which groups take precedence over other tasks.

Claims (26)

1. A computer implemented method of processing an application that includes a plurality of application execution threads in a computer environment that includes a plurality of dissimilar processors, said method comprising:

receiving a resource request from the application that is running a first application execution thread on a first processor type;

assigning one or more second processor types and a memory space to a group in response to the resource request, wherein the first processor type shares the memory space with the assigned second processor types, and wherein the first processor and the assigned second processor types are heterogeneous;

executing a second application execution thread on at least one of the second processor types assigned to the group;

identifying whether the application requests the memory space to be a private memory, wherein the private memory is accessible only by the assigned second processor types; and

classifying the memory space as the private memory in response to the identification of the memory space as the private memory.

2. The method as described in claim 1 further comprising:

retrieving data from the private memory using one of the assigned second processor types;

manipulating the data using one of the assigned second processor types, the manipulating resulting in resultant data; and

storing the resultant data in a shared memory, the shared memory accessible by the first processor type.

3. The method as described in claim 1 further comprising:

retrieving an affinity selection bit from the application;

determining whether the application requests affinity processor selection based upon the affinity selection bit; and

performing the assigning using affinity processor selection.

4. The method as described in claim 3 wherein the performing further comprises:

selecting one of the second processor types based upon the affinity processor selection;

determining whether the selected second processor type is available; and

performing the assigning based upon the selected second processor type's availability.

5. The method as described in claim 1 further comprising:

detecting that one or more of the second processor types are in use by an active execution thread;

identifying an active priority that corresponds to the active execution thread;

comparing the active priority to a requesting priority, the requesting priority corresponding to the application execution thread; and

terminating the active execution thread if the active priority is lower than the requesting priority.

6. The method as described in claim 1 wherein the group corresponds to one or more group properties, wherein the group properties are selected from the group consisting of a sharing mode, a priority, and a scheduling policy.

7. The method as described in claim 1 wherein the group includes a plurality of second processors.

8. The method as described in claim 1 wherein the first processor type is a processing unit and wherein the second processor types are synergistic processing units.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2022
From: INTEL CORPORATION
To: TAHOE RESEARCH, LTD.
Reel/Frame 061175/0176 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2013
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: INTEL CORPORATION
Reel/Frame 030228/0415 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 25, 2003
From: AGUILARJR, MAXIMINO; DAY, MICHAEL N.; NUTTER, MARK R.; XENIDIS, JAMES
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 014559/0217 →