Structure and method for enhanced performance in semiconductor substrates
View Patent ↗An etched substrate structure is augmented by conductive material to provide enhanced electrical and/or thermal performance. A semiconductor device substrate comprising active regions defined on a top surface is masked and etched to define a pattern of blind features in a bottom surface of the substrate. A conductive material is then deposited on the surface of the blind features. The replacement of semiconductor material with the conductive material lowers the resistance between the active elements on the top surface and the bottom surface. The blind features may be placed in proximity to parasitic bipolar transistors in order to increase immunity to latchup. During wafer processing, a pattern of grooves aligned opposite to a scribe street pattern may be etched on the wafer back side in order to facilitate the separation of individual devices.
1. A semiconductor device comprising:
a semiconductor substrate comprising a top surface and a bottom surface, wherein said top surface includes a first street and a second street, wherein an inactive region is below each of said streets;
a plurality of separate active regions formed on said top surface wherein said separate active regions are formed between said first street and said second street on said top surface, wherein each separate active region comprises at least one transistor; and
a plurality of street grooves disposed on said bottom surface of said semiconductor substrate, wherein each street groove represents a groove formed such that the inactive region is above said groove, wherein each street groove is aligned opposite one of said first and second streets such that each area between said street groove and said street is an inactive region.
2. The semiconductor device of claim , further comprising:
a plurality of blind features disposed in said bottom surface; and
a material deposited on surfaces of said blind features, wherein an electrical conductivity of said material is greater than an electrical conductivity of said semiconductor substrate.
3. The semiconductor device of claim 2 , wherein a thermal conductivity of said material is greater than a thermal conductivity of said semiconductor substrate.
4. The semiconductor device of claim 2 , wherein said material partially fills each of the blind features.
5. The semiconductor device of claim 2 , wherein said material completely fills each of the blind features.
6. The semiconductor device of claim 2 , wherein said semiconductor substrate comprises a material selected from the group consisting of silicon, germanium, and III–V compounds.