Patent Assignment
Reel/Frame 025949/0001
Assignment of Assignor's Interest
Recorded: 2011-03-14
Pages: 8
Assignor
QSPEED SEMICONDUCTOR, INC
Executed: 2010-12-31
Assignee
POWER INTEGRATIONS, INC.
5245 HELLYER AVENUE, SAN JOSE, CALIFORNIA, 95138
Covered Properties
(52)
Novel Jfet Structure and Manufacture Method for Low on-Resistance and Low Voltage Application
Patent:
6,251,716 →
Application:
09/430,500 →
Enhancement Mode Junction Field Effect Transistor with Low on Resistance
Patent:
6,674,107 →
Application:
09/453,136 →
Power Supply Module in Integrated Circuits
Patent:
6,281,705 →
Application:
09/453,141 →
Switcher for Switching Capacitors
Patent:
6,304,007 →
Application:
09/453,165 →
Complementary Junction Field Effect Transistors
Patent:
6,307,223 →
Application:
09/458,571 →
Asymmetric depletion region for normally off jfet
Patent:
6,355,513 →
Application:
09/669,480 →
Two Terminal Rectifier Using Normally Off Jfet
Patent:
6,566,936 →
Application:
09/670,176 →
Cascade Circuits Utilizing Normally-Off Junction Field Effect Transistors for Low on-Resistance and Low Voltage Applications
Patent:
6,750,698 →
Application:
09/676,370 →
Rectifier Circuits with Low Forward Voltage Jfet Device
Patent:
6,621,722 →
Application:
09/690,690 →
Novel Jfet Structure and Manufacture Method for Low on-Resistance and Low Voltage Application
Patent:
6,486,011 →
Application:
09/690,703 →
Starter Device for Normally Off Jfets
Patent:
6,614,289 →
Application:
09/708,336 →
Full wave rectifier circuit using normally off JFETs
Patent:
6,349,047 →
Application:
09/741,488 →
Buck converter with normally off JFET
Patent:
6,356,059 →
Application:
09/785,972 →
Power Supply Module in Integrated Circuits
Patent:
6,542,001 →
Application:
09/835,616 →
Boost Circuit with Normally Off Jfet
Patent:
6,580,252 →
Application:
09/877,351 →
Semiconductor Package for Power Jfet Having Copper Plate for Source and Ribbon Contact for Gate
Patent:
6,528,880 →
Application:
09/892,128 →
Full Wave Rectifier Circuit Using Normally Off Jfets
Patent:
6,549,439 →
Application:
09/915,987 →
Method and Structure for a High Voltage Junction Field Effect Transistor
Patent:
6,900,506 →
Application:
10/117,019 →
Jfet and Mesfet Structures for Low Voltage, High Current and High Frequency Applications
Patent:
6,921,932 →
Application:
10/153,012 →
Structure for Reduced Gate Capacitance in a Jfet
Patent:
7,268,378 →
Application:
10/158,326 →
Method and Structure for Double Dose Gate in a Jfet
Patent:
6,777,722 →
Application:
10/191,030 →
Mosfet Driver Matching Circuit for an Enhancement Mode Jfet
Patent:
6,661,276 →
Application:
10/209,211 →
Flip-Chip Packaging
Patent:
6,747,342 →
Application:
10/215,570 →
Structure for a Junction Field Effect Transitor with Reduced Gate Capacitance
Patent:
6,696,706 →
Application:
10/278,303 →
Electrostatic Discharge Protection Device for Integrated Circuits
Patent:
6,774,417 →
Application:
10/279,806 →
Programmable Junction Field Effect Transistor and Method for Programming Same
Patent:
7,075,132 →
Application:
10/335,403 →
Two Terminal Rectifier Using Normally Off Jfet
Patent:
6,734,715 →
Application:
10/360,450 →
Buck-Boost Circuit with Normally Off Jfet
Patent:
7,098,634 →
Application:
10/371,856 →
Guard Ring Structure and Method for Fabricating Same
Patent:
7,009,228 →
Application:
10/379,768 →
Dual Gate Structure for a Fet and Method for Fabricating Same
Patent:
7,038,260 →
Application:
10/382,344 →
Method and Structure for Composite Trench Fill
Patent:
6,887,768 →
Application:
10/439,558 →
Starter Device for Normally Off Jfets
Patent:
6,975,157 →
Application:
10/609,253 →
Method for a Junction Field Effect Transistor with Reduced Gate Capacitance
Patent:
6,812,079 →
Application:
10/677,570 →
Structure and Method for Enhanced Performance in Semiconductor Substrates
Patent:
7,227,242 →
Application:
10/683,719 →
Flip-Chip Packaging
Method for a Junction Field Effect Transistor with Reduced Gate Capacitance
Patent:
7,452,763 →
Application:
10/776,487 →
Electrostatic Discharge Protection Device for Integrated Circuits
Patent:
7,009,229 →
Application:
10/793,077 →
Method and Structure for Composite Trench Fill
Patent:
7,265,398 →
Application:
10/816,980 →
Method and Structure for Double Dose Gate in a Jfet
Patent:
6,995,052 →
Application:
10/867,972 →
Schottky Barrier Rectifier and Method of Manufacturing the Same
Patent:
7,238,976 →
Application:
10/869,718 →
Method of Manufacturing a Schottky Barrier Rectifier
Patent:
7,220,661 →
Application:
11/023,272 →
Programmable Junction Field Effect Transistor and Method for Programming Same
Patent:
7,655,964 →
Application:
11/086,199 →
Multiple Doped Channel in a Multiple Doped Gate Junction Field Effect Transistor
Patent:
7,211,845 →
Application:
11/110,507 →
Jfet and Mesfet Structures for Low Voltage High Current and High Frequency Applications
Patent:
7,045,397 →
Application:
11/121,381 →
Mosfet Having a Jfet Embedded as a Body Diode
Patent:
7,417,266 →
Application:
11/149,718 →
Ultrafast Recovery Diode
Composite Field Effect Transistor
Patent:
7,348,826 →
Application:
11/378,412 →
Jfet and Mesfet Structures for Low Voltage, High Current and High Frequency Applications
Patent:
7,262,461 →
Application:
11/406,469 →
Structure and Method for a Fast Recovery Rectifier Structure
Circuit and Method for Driving a Junction Field Effect Transistor
Patent:
7,746,156 →
Application:
11/787,456 →
Mosfet Having a Jfet Embedded as a Body Diode
Liquid Crystal Display Panel and Method of Fabricating the Same