Patent Assignment
Reel/Frame 018616/0298
Merger
Recorded: 2006-12-12
Received: 2006-12-12
Pages: 8
Assignor
QSPEED SEMICONDUCTOR INC.
Executed: 2006-06-06
Assignee
QSPEED SEMICONDUCTOR INC.
3970 FREEDOM CIRCLE, SUITE 101, SANTA CLARA, CA, 95054, UNITED STATES
Covered Properties
(39)
Jfet and Mesfet Structures for Low Voltage, High Current and High Frequency Applications
Application:
11/406,469 →
Composite Field Effect Transistor
Application:
11/378,412 →
Ultrafast Recovery Diode
Application:
11/320,313 →
Fast recovery rectifier structure
Application:
60/754,550 →
Field Effect Transistor
Application:
11/149,716 →
Mosfet Having a Jfet Embedded as a Body Diode
Application:
11/149,718 →
Jfet and Mesfet Structures for Low Voltage High Current and High Frequency Applications
Application:
11/121,381 →
Multiple Doped Channel in a Multiple Doped Gate Junction Field Effect Transistor
Application:
11/110,507 →
Programmable Junction Field Effect Transistor and Method for Programming Same
Application:
11/086,199 →
Method of Manufacturing a Schottky Barrier Rectifier
Application:
11/023,272 →
Schottky Barrier Rectifier and Method of Manufacturing the Same
Application:
10/869,718 →
Method and Structure for Double Dose Gate in a Jfet
Application:
10/867,972 →
Method and Structure for Composite Trench Fill
Application:
10/816,980 →
Electrostatic Discharge Protection Device for Integrated Circuits
Application:
10/793,077 →
Method for a Junction Field Effect Transistor with Reduced Gate Capacitance
Application:
10/776,487 →
Flip-Chip Packaging
Application:
10/728,449 →
Structure and Method for Enhanced Performance in Semiconductor Substrates
Application:
10/683,719 →
Method for a Junction Field Effect Transistor with Reduced Gate Capacitance
Application:
10/677,570 →
Starter Device for Normally Off Jfets
Application:
10/609,253 →
Method and Structure for Composite Trench Fill
Application:
10/439,558 →
Guard Ring Structure and Method for Fabricating Same
Application:
10/379,768 →
Dual Gate Structure for a Fet and Method for Fabricating Same
Application:
10/382,344 →
Buck-Boost Circuit with Normally Off Jfet
Application:
10/371,856 →
Two Terminal Rectifier Using Normally Off Jfet
Application:
10/360,450 →
Programmable Junction Field Effect Transistor and Method for Programming Same
Application:
10/335,403 →
Electrostatic Discharge Protection Device for Integrated Circuits
Application:
10/279,806 →
Structure for a Junction Field Effect Transitor with Reduced Gate Capacitance
Application:
10/278,303 →
Flip-Chip Packaging
Application:
10/215,570 →
Mosfet Driver Matching Circuit for an Enhancement Mode Jfet
Application:
10/209,211 →
Method and Structure for Double Dose Gate in a Jfet
Application:
10/191,030 →
Structure for Reduced Gate Capacitance in a Jfet
Application:
10/158,326 →
Jfet and Mesfet Structures for Low Voltage, High Current and High Frequency Applications
Application:
10/153,012 →
Method and Structure for a High Voltage Junction Field Effect Transistor
Application:
10/117,019 →
System and Method for Caching and Utilizing Flight Availability Data
Application:
10/114,748 →
Full Wave Rectifier Circuit Using Normally Off Jfets
Application:
09/915,987 →
Semiconductor Package for Power Jfet Having Copper Plate for Source and Ribbon Contact for Gate
Application:
09/892,128 →
Boost Circuit with Normally Off Jfet
Application:
09/877,351 →
Power Supply Module in Integrated Circuits
Application:
09/835,616 →
Buck converter with normally off JFET
Application:
09/785,972 →