IP Library Granted Patent US 7,204,743
Granted Patent B2
US 7,204,743 · App. 10/703,293 · Granted Apr 17, 2007

Integrated circuit interconnect fabrication systems

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Quick Facts
Patent No.
US 7,204,743
App. No.
10/703,293
Granted
Apr 17, 2007
Kind
B2
Abstract

A system for processing a conductive surface on a front surface of a wafer to form a metallic interconnect structure is disclosed. The system for processing comprises an electrochemical mechanical processing (ECMPR) module configured to form a substantially planarized conductive layer on the front surface of the wafer, a chamber within the ECMPR module configured to remove conductive material from an edge region of the wafer, a CMP module configured to receive the wafer from the ECMPR module and polish the planarized conductive layer on the surface of the wafer to form the metallic interconnect structure, and a robot configured to transfer the wafer from the ECMPR module to the chemical mechanical polish (CMP) module. In one aspect of the invention, the ECMPR module deposits conductive material on the front surface of the wafer. The ECMPR module removes at least a portion of the conductive layer from the front surface of the wafer. Advantages of the invention include improved control of deposited metal to improve device consistency and yield.

Claims (34)

1. A system for processing a conductive surface on a front surface of a wafer to form a metallic interconnect structure, comprising:

an electrochemical mechanical processing (ECMPR) module configured to form a substantially planarized conductive layer on the front surface of the wafer;

a chamber within the ECMPR module configured to remove conductive material from an edge region of the wafer;

a CMP module configured to receive the wafer from the ECMPR module and polish the planarized conductive layer on the surface of the wafer to form the metallic interconnect structure; and

a robot configured to transfer the wafer from the ECMPR module to the chemical mechanical polish (CMP) module.

2. The system according to claim 1 , wherein the ECMPR module removes at least a portion of the conductive layer from the front surface of the wafer.

3. The system according to claim 1 , wherein the ECMPR module deposits conductive material on the front surface of the wafer.

4. The system according the claim 3 , wherein the CMP module removes at least a portion of the conductive surface on the front surface of the wafer.

5. The system according to claim 3 further comprising a cleaning module configured to clean conductive material from a back surface of the wafer, wherein the robot transfers the wafer from the ECMPR module to the cleaning module.

6. The system according to claim 5 , wherein the cleaning module reduces the conductive material concentration of the back surface to less than 10 11 atoms/cm 2 .

7. The system according to claim 5 , wherein the cleaning module removes the conductive material from an edge region of the wafer.

8. The system according to claim 1 , wherein the CMP module removes at least a portion of the conductive layer from the front surface of the wafer.

9. The system according to claim 1 , wherein the conductive layer includes a barrier layer and the CMP module removes the barrier layer from the front surface of the wafer to form the metallic interconnect structure.

10. The system according to claim 1 further comprising an anneal module configured to anneal the wafer, wherein the robot transfers the wafer from the ECMPR module to the anneal module.

11. The system according to claim 1 further comprising an anneal module configured to anneal the wafer, wherein the robot transfers the wafer from the CMP module to the anneal module.

12. The system according to claim 1 , wherein the chamber rinses, cleans, and dries the wafer.

13. The system according to claim 1 , wherein the ECMPR module performs a touch ECMPR process to planarize the conductive layer on the front side of the wafer.

14. The system according to claim 1 , wherein the CMP module comprises a fixed abrasive pad and an abrasive-free slurry and is configured to polish the front surface of the wafer with the fixed abrasive pad and the abrasive-free slurry.

15. The system according to claim 1 further comprising another CMP module configured to polish the conductive layer and a barrier layer on the front surface of the wafer, wherein the robot transfers the wafer from the CMP module to another CMP module.

16. The system according to claim 15 , wherein the another CMP module comprises a non-abrasive pad and a slurry and is configured to polish the front surface of the wafer with the non-abrasive pad and the slurry.

17. The system according to claim 15 further comprising an anneal module configured to anneal the wafer, wherein the robot transfers the wafer from the CMP module to the anneal module.

18. The system according to claim 15 further comprising an anneal module configured to anneal the wafer, wherein the robot transfers the wafer from the another CMP module to the anneal module.

19. The system according to claim 1 , wherein the ECMPR module is configured to etch the conductive layer from the front surface of the wafer.

20. The system according to claim 1 , wherein the conductive layer comprises copper.

21. A system for processing a conductive surface on a front surface of a wafer to form a metallic interconnect structure, comprising:

an electrochemical mechanical processing (ECMPR) module configured to form a substantially planarized conductive layer over both the front surface and features within the front surface of the wafer, wherein the ECMPR module is configured to deposit conductive material on the front surface of the wafer;

a CMP module configured to receive the wafer from the ECMPR module and remove at least a portion of the conductive layer from the front surface of the wafer to form the metallic interconnect structure;

a robot configured to transfer the wafer from the ECMPR module to the chemical mechanical polish (CMP) module; and

a chamber within the ECMPR module configured to rinse, clean, and dry the wafer.

22. A system for processing a conductive surface on a front surface of a wafer to form a metallic interconnect structure, comprising:

an electrochemical mechanical processing (ECMPR) module configured to form a substantially planarized conductive layer over both the front surface and features within the front surface of the wafer;

a CMP module configured to receive the wafer from the ECMPR module and remove at least a portion of the conductive layer from the front surface of the wafer to form the metallic interconnect structure;

a robot configured to transfer the wafer from the ECMPR module to the chemical mechanical polish (CMP) module; and

a chamber within the ECMPR module configured to remove conductive material from an edge region of the wafer.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 2, 2007
From: ASM NUTOOL, INC.
To: NOVELLUS SYSTEMS, INC.
Reel/Frame 018963/0409 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 2, 2007
From: ASM NUTOOL, INC.
To: NOVELLUS SYSTEMS, INC.
Reel/Frame 018963/0424 →
CHANGE OF NAME Recorded Feb 10, 2005
From: NUTOOL, INC.
To: ASM NUTOOL, INC.
Reel/Frame 015701/0786 →
CHANGE OF NAME Recorded Dec 20, 2004
From: NUTOOL, INC.
To: ASM NUTOOL, INC.
Reel/Frame 015479/0376 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 7, 2003
From: BASOL, BULENT M.; TALIEH, HOMAYOUN
To: NUTOOL, INC.
Reel/Frame 014689/0402 →