IP Library Granted Patent US 7,020,536
Granted Patent B2
US 7,020,536 · App. 10/708,059 · Granted Mar 28, 2006

Method of building a defect database

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Quick Facts
Patent No.
US 7,020,536
App. No.
10/708,059
Granted
Mar 28, 2006
Kind
B2
Abstract

First, a wafer with a plurality of defects generated in a first semiconductor process is provided. A defect inspection is performed to detect the defects on the wafer. Then, an automatic defect classification is performed according to a predetermined defect database having a defect classification recipe generated from a second semiconductor process. After that, a verifying process is further performed by comparing the result of the automatic defect classification with that of a manual defect classification to verify the accuracy of the automatic defect classification.

Claims (28)

1. A method of building a wafer defect database, the wafer defect database comprising a defect classification recipe which is used for a defect classification machine to perform an automatic defect classification, the method of building the defect database comprising following steps:

(a) providing a first wafer with a plurality of defects thereon that were generated during a first semiconductor process;

(b) performing a defect inspection to the first wafer to detect the defects;

(c) providing a predetermined defect database which comprises a defect classification recipe corresponding to a second semiconductor process;

(d) utilizing the defect classification machine to perform an automatic defect classification according to the predetermined defect database to separate the defects into a plurality of defect types;

(e) performing a manual defect classification to verify the accuracy of the automatic defect classification to each defect type;

(f) assigning the predetermined defect database as the wafer defect database when the accuracy of the automatic defect classification is qualified and setting up the predetermined database for online usage;

(g) performing an updating step to correct the predetermined defect database when the accuracy of a specific defect type of the automatic defect classification is not qualified, wherein the updating step comprises:

providing a second wafer with a plurality of defects, wherein the second wafer was generated from the first semiconductor process;

performing a defect inspection to the second wafer; and

collecting defect classification recipe of the specific defect type to correct the defect classification recipe within the predetermined defect database; and

(h) repeating steps (d), (e), (f), and (g) to complete the wafer defect database.

2. The method of claim 1 wherein the second semiconductor process is a previous generation process compared to the first semiconductor process with the same design rule.

3. The method of claim 1 wherein the first semiconductor process and the second semiconductor process have similar patterns or defect types.

4. A method of an automatic wafer defect classification comprising:

providing a wafer with a plurality of defects thereon that were generated during a first semiconductor process;

performing a defect inspection to detect the defects;

providing a defect database which comprises a defect classification recipe corresponding to a second semiconductor process; and

performing an automatic defect classification according to the defect recipe to separate the defects into a plurality of defect types.

5. The method of claim 4 further comprising a verifying step to verify accuracy of the automatic defect classification for each defect type, the verifying step comprising:

performing a manual defect classification to the defect; and

utilizing the result from the manual defect classification to verify the accuracy of the automatic defect classification.

6. The method of claim 5 further comprising a step of updating the defect database if the accuracy of the automatic defect classification is not qualified, the step comprising:

collecting defect information from another wafer respective to the classification type with unqualified accuracy according to the result of the manual defect classification;

correcting the defect database according to the defect information; and

repeating the verifying step.

7. The method of claim 4 wherein the second semiconductor process is a previous generation process compared to the first semiconductor process with the some design rule.

8. The method of claim 4 wherein the first semiconductor process and the second semiconductor process have similar patterns or defect types.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2019
From: POWERCHIP TECHNOLOGY CORPORATION
To: POWERCHIP SEMICONDUCTOR MANUFACTURING CORPORATION
Reel/Frame 049746/0970 →
CHANGE OF NAME Recorded Jun 24, 2019
From: POWERCHIP SEMICONDUCTOR CORP.
To: POWERCHIP TECHNOLOGY CORPORATION
Reel/Frame 049562/0151 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 6, 2004
From: LIN, LONG-HUI; KUO, FENG-MING; CHENG, SU-FEN
To: POWERCHIP SEMICONDUCTOR CORP.
Reel/Frame 014310/0267 →