Three-mask method of constructing the final hard mask used for etching the silicon fins for FinFETs
View Patent ↗Presented is a three-mask method of constructing the final hard mask used for etching the silicon fins and the source/drain silicon regions for FinFETs, and silicon mesas for non-FinFET devices such as resistors, diodes, and capacitors. More specifically, a first mask is used to create a mandrel; a second mask is used to pattern the mandrel's sidewall spacers; and a third mask is used to pattern the box-shaped structures that are connected by one of the sidewall spacers. An alignment of the gate conductor to the box-shaped structures is provided.
1. A method of manufacturing a fin-type field effect transistor (FinFET), said method comprising:
forming a modified H-shaped structure over a silicon layer structure, wherein said forming of said modified H-shaped structure includes forming alignment marks in said silicon layer structure separate from said modified H-shaped structure;
transferring said modified H-shaped structure pattern into a silicon layer of said silicon layer structure, such that a portion of said silicon layer has said modified H-shaped structure that includes two opposing box-shaped structures connected by a fin;
forming a gate conductor between said box-shaped structures of said silicon layer, wherein said gate conductor intersects said fin, and wherein said process of forming said gate conductor aligns said gate conductor with said modified H-shaped structure using said alignment marks;
forming a gate sidewall spacer on said gate conductor, wherein said gate sidewall spacer is present only on said gate conductor and is not present on said modified H-shaped structure of said silicon layer; and
growing additional silicon on said modified H-shaped structure of said silicon layer.
2. The method in claim 1 , wherein said process of forming said modified H-shaped structure comprises:
forming mandrels on said silicon layer structure;
forming sidewall spacers around said mandrels;
removing said mandrels and leaving said sidewall spacers in place;
removing portions said sidewall spacers; and
forming masks over portions of said sidewall spacers, such that a remaining sidewall spacer connects said masks and creates said modified H-shaped structure.
3. The method in claim 2 , wherein said remaining spacer is perpendicular to said opposing sidewall spacers.
4. The method in claim 1 , further comprising, after said process of growing said additional silicon, implanting impurities into said modified H-shaped structure of said silicon layer.
5. The method in claim 1 , further comprising, before forming said gate conductor:
growing a sacrificial oxide on said modified H-shaped structure of said silicon layer;
implanting impurities into said fin and said box-shaped structures of said silicon layer; and
removing said sacrificial oxide.
6. The method in claim 1 , further comprising, before forming said gate conductor, forming a gate insulator over said fin of said silicon layer.
7. The method in claim 1 , wherein, in said modified H-shaped structure, said fin is not centered along the lengths of said opposing box-shaped structures.
8. A method of manufacturing a fin-type field effect transistor (FinFET), said method comprising:
forming a modified H-shaped structure over a laminate structure, wherein said laminate structure comprises a substrate, a silicon layer above said substrate, and a hard mask above said silicon layer, and wherein said process of forming said modified H-shaped structure includes forming alignment marks in said laminate structure separate from said modified H-shaped structure;
transferring said modified H-shaped structure pattern into said hard mask;
removing said modified H-shaped structure;
using said hard mask to transfer said modified H-shaped structure pattern into said silicon layer, such that a portion of said silicon layer has said modified H-shaped structure that includes two opposing box-shaped structures connected by a fin;
forming a gate conductor between said box-shaped structures of said silicon layer, wherein said gate conductor intersects said fin, and wherein said process of forming said gate conductor aligns said gate conductor with said modified H-shaped structure using said alignment marks;
forming a gate sidewall spacer on said gate conductor, wherein said gate sidewall spacer is present only on said gate conductor and is not present on said modified H-shaped structure of said silicon layer; and
growing additional silicon on said modified H-shaped structure of said silicon layer.
9. The method in claim 8 , wherein said process of forming said modified H-shaped structure comprises:
forming a mandrel on said hard mask;
forming sidewall spacers around said mandrel;
removing said mandrel and leaving said sidewall spacers in place;
removing one segment of said sidewall spacers; and
forming box-shaped structures over opposing sidewall spacers that remain after removing said one segment of said sidewall spacers, such that a remaining sidewall spacer connects said box-shaped structures and creates said modified H-shaped structure.
10. The method in claim 9 , wherein said remaining spacer is perpendicular to said opposing sidewall spacers.
11. The method in claim 8 , further comprising, after said process of growing said additional silicon, implanting impurities into said modified H-shaped structure of said silicon layer.
12. The method in claim 8 , further comprising, before forming said gate conductor:
growing a sacrificial oxide on said modified H-shaped structure of said silicon layer;
implanting impurities into said fin and said box-shaped structures of said silicon layer; and
removing said sacrificial oxide.
13. The method in claim 8 , further comprising, before forming said gate conductor, forming a gate oxide over said fin of said silicon layer.
14. The method in claim 8 , wherein, in said modified H-shaped structure, said fin is not centered along the lengths of said opposing box-shaped structures.
15. A method of manufacturing a fin-type field effect transistor (FinFET), said method comprising:
forming a mandrel over a laminate structure, wherein said laminate structure comprises a substrate, a silicon layer above said substrate, and a hard mask above said silicon layer;
forming sidewall spacers around said mandrel;
removing said mandrel and leaving said sidewall spacers in place;
removing one segment of said sidewall spacers;
forming box-shaped structures over opposing sidewall spacers that remain after removing said one segment of said sidewall spacers, such that a remaining sidewall spacer connects said box-shaped structures and creates a modified H-shaped structure over said hard mask, and wherein said process of forming said box-shaped structures includes forming alignment marks in said laminate structure separate from said modified H-shaped structure;
transferring said modified H-shaped structure pattern into said hard mask;
removing said modified H-shaped structure;
using said hard mask to transfer said modified H-shaped structure pattern into said silicon layer, such that a portion of said silicon layer has said modified H-shaped structure that includes two opposing box-shaped structures connected by a fin;
forming a gate conductor between said box-shaped structures of said silicon layer, wherein said gate conductor intersects said fin, and wherein said process of forming said gate conductor aligns said gate conductor with said modified H-shaped structure using said alignment marks;
forming a gate sidewall spacer on said gate conductor, wherein said gate sidewall spacer is present only on said gate conductor and is not present on said modified H-shaped structure of said silicon layer; and
growing additional silicon on said modified H-shaped structure of said silicon layer.
16. The method in claim 15 , further comprising, after said process of growing said additional silicon, implanting impurities into said modified H-shaped structure of said silicon layer.
17. The method in claim 15 , further comprising, before forming said gate conductor:
growing a sacrificial oxide on said modified H-shaped structure of said silicon layer;
implanting impurities into said fin and said box-shaped structures of said silicon layer; and
removing said sacrificial oxide.
18. The method in claim 15 , further comprising, before forming said gate conductor, forming a gate oxide over said fin of said silicon layer.
19. The method and in claim 15 , wherein said remaining spacer is perpendicular to said opposing sidewall spacers.
20. The method in claim 15 , wherein, in said modified H-shaped structure, said fin is not centered along the lengths of said opposing box-shaped structures.