Method for making semiconductor device including band-engineered superlattice
View Patent ↗A method is for making a semiconductor device by forming a superlattice that, in turn, includes a plurality of stacked groups of layers. The method may also include forming regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. The energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions so that the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise occur. The superlattice may also have a common energy band structure therein.
1. A method for making a semiconductor device comprising:
forming a superlattice comprising a plurality of stacked groups of layers; and
each group of layers of the superlattice comprising four stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon;
the energy-band modifying layer comprising at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.
2. A method according to claim 1 wherein the superlattice also has a common energy band structure therein.
3. A method according to claim 1 wherein the superlattice has a higher charge carrier mobility in at least one direction than would otherwise be present.
4. A method according to claim 3 wherein the higher charge carrier mobility results from a lower conductivity effective mass for the charge carriers in a parallel direction than would otherwise be present.
5. A method according to claim 4 wherein the lower conductivity effective mass is less than two-thirds the conductivity effective mass that would otherwise occur.
6. A method according to claim 3 wherein the charge carriers having the higher mobility comprise at least one of electrons and holes.
7. A method according to claim 1 wherein each base semiconductor portion comprises silicon.
8. A method according to claim 1 wherein each energy band-modifying layer comprises oxygen.
9. A method according to claim 1 wherein each energy band-modifying layer is a single monolayer thick.
10. A method according to claim 1 wherein the superlattice further has a substantially direct energy bandgap.
11. A method according to claim 1 wherein the superlattice further comprises a base semiconductor cap layer on an uppermost group of layers.
12. A method according to claim 1 wherein each non-semiconductor monolayer is thermally stable through deposition of a next layer.
13. A method according to claim 1 wherein each base semiconductor portion comprises a base semiconductor selected from the group consisting of Group IV semiconductors, Group III–V semiconductors, and Group II–VI semiconductors.
14. A method according to claim 1 wherein each energy band-modifying layer comprises a non-semiconductor selected from the group consisting of oxygen, nitrogen, fluorine, and carbon-oxygen.
15. A method according to claim 1 wherein forming the superlattice comprises forming the superlattice on a substrate.
16. A method according to claim 1 further comprising doping the superlattice with at least one type of conductivity dopant therein.
17. A method according to claim 1 wherein the superlattice defines a channel for a transistor.
18. A method for making a semiconductor device comprising:
forming a superlattice comprising a plurality of stacked groups of layers; and
each group of layers of the superlattice comprising four stacked silicon atomic layers defining a silicon portion and an energy band-modifying layer thereon;
the energy-band modifying layer comprising at least one oxygen atomic layer constrained within a crystal lattice of adjacent silicon portions.
19. A method according to claim 18 wherein the superlattice has a common energy band structure therein.
20. A method according to claim 18 wherein the superlattice has a higher charge carrier mobility in at least one direction than would otherwise be present.
21. A method according to claim 20 wherein the higher charge carrier mobility results from a lower conductivity effective mass for the charge carriers in a parallel direction than would otherwise be present.
22. A method according to claim 20 wherein the charge carriers having the higher mobility comprise at least one of electrons and holes.
23. A method according to claim 18 wherein each energy band-modifying layer is a single atomic layer thick.
24. A method according to claim 18 wherein the superlattice further has a substantially direct energy bandgap.
25. A method according to claim 18 wherein the superlattice further comprises a silicon cap layer on an uppermost group of layers.
26. A method according to claim 18 wherein forming the superlattice comprises forming the superlattice on a substrate.
27. A method according to claim 18 further comprising doping the superlattice with at least one type of conductivity dopant therein.
28. A method according to claim 18 wherein the superlattice defines a channel for a transistor.