IP Library Granted Patent US 6,927,413
Granted Patent B2
US 6,927,413 · App. 10/717,375 · Granted Aug 9, 2005

Semiconductor device including band-engineered superlattice

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Quick Facts
Patent No.
US 6,927,413
App. No.
10/717,375
Granted
Aug 9, 2005
Kind
B2
Abstract

A semiconductor device includes a superlattice that, in turn, includes a plurality of stacked groups of layers. The device may also include regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. Moreover, the energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Accordingly, the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise be present.

Claims (32)

1. A semiconductor device comprising:

a superlattice comprising a plurality of stacked groups of layers;

each group of layers of said superlattice comprising four stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon;

said energy-band modifying layer comprising at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.

2. A semiconductor device according to claim 1 wherein said superlattice has a common energy band structure therein.

3. A semiconductor device according to claim 1 wherein said superlattice has a higher charge carrier mobility in at least one direction than would otherwise be present.

4. A semiconductor device according to claim 3 wherein the higher charge carrier mobility results from a lower conductivity effective mass for the charge carriers in the parallel direction than would otherwise be present.

5. A semiconductor device according to claim 4 wherein the lower conductivity effective mass is less than two-thirds the conductivity effective mass that would otherwise occur.

6. A semiconductor device according to claim 3 the charge carriers having the higher mobility comprise at least one of electrons and holes.

7. A semiconductor device according to claim 1 wherein each base semiconductor portion comprises silicon.

8. A semiconductor device according to claim 1 wherein each energy band-modifying layer comprises oxygen.

9. A semiconductor device according to claim 1 wherein each energy band-modifying layer is a single monolayer thick.

10. A semiconductor device according to claim 1 wherein said superlattice further comprises a base semiconductor cap layer on an uppermost group of layers.

11. A semiconductor device according to claim 1 wherein each non-semiconductor monolayer is thermally stable through deposition of a next layer.

12. A semiconductor device according to claim 1 wherein each base semiconductor portion comprises a base semiconductor selected from the group consisting of Group IV semiconductors, Group III-V semiconductors, and Group II-VI semiconductors.

13. A semiconductor device according to claim 1 wherein each energy band-modifying layer comprises a non-semiconductor selected from the group consisting of oxygen, nitrogen, fluorine, and carbon-oxygen.

14. A semiconductor device according to claim 1 further comprising a substrate adjacent said superlattice.

15. A semiconductor device according to claim 1 wherein said superlattice further comprises at least one type of conductivity dopant therein.

16. A semiconductor device according to claim 1 wherein said superlattice defines a channel of a transistor.

17. A semiconductor device comprising:

a superlattice comprising a plurality of stacked groups of layers;

each group of layers of said superlattice comprising four stacked base silicon monolayers defining a base silicon portion and an energy band-modifying layer thereon;

said energy-band modifying layer comprising at least one oxygen monolayer constrained within a crystal lattice of adjacent base semiconductor portions.

18. A semiconductor device according to claim 17 wherein said superlattice has a common energy band structure therein.

19. A semiconductor device according to claim 17 wherein said superlattice has a higher charge carrier mobility in at least one direction than would otherwise be present.

20. A semiconductor device according to claim 19 wherein the higher charge carrier mobility results from a lower conductivity effective mass for the charge carriers in the parallel direction than would otherwise be present.

21. A semiconductor device according to claim 19 the charge carriers having the higher mobility comprise at least one of electrons and holes.

22. A semiconductor device according to claim 17 wherein wherein each at least one energy band-modifying oxygen monolayer is a single oxygen monolayer thick.

23. A semiconductor device according to claim 17 wherein said superlattice further comprises a base semiconductor cap layer on an uppermost group of layers.

24. A semiconductor device according to claim 17 further comprising a substrate adjacent said superlattice.

25. A semiconductor device according to claim 17 wherein said superlattice further comprises at least one type of conductivity dopant therein.

26. A semiconductor device according to claim 17 wherein said superlattice defines a channel of a transistor.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Sep 3, 2020
From: CLIFFORD, ROBERT
To: ATOMERA INCORPORATED
Reel/Frame 053681/0942 →
CHANGE OF NAME Recorded Apr 11, 2016
From: MEARS TECHNOLOGIES, INC.
To: ATOMERA INCORPORATED
Reel/Frame 038400/0349 →
SECURITY INTEREST Recorded Mar 17, 2015
From: MEARS TECHNOLOGIES, INC.
To: LIQUID VENTURE PARTNERS, LLC
Reel/Frame 035216/0473 →
CHANGE OF NAME Recorded Aug 21, 2007
From: RJ MEARS, LLC
To: MEARS TECHNOLOGIES, INC.
Reel/Frame 019714/0907 →