Method of forming gate electrode in semiconductor device
View Patent ↗A method for forming a gate electrode in the semiconductor device is disclosed. The disclosed methods for forming a gate electrode in a semiconductor includes forming a polysilicon film and a metal silicide film sequentially on an upper portion of a semiconductor substrate; performing an annealing process to crystallize the metal silicide film, so that etch rate of the crystallized metal silicide film is similar to that of the polysilicon film; and forming a gate electrode by performing an etching process at one time on the metal silicide film and the polysilicon film using the similar etch rates of the crystallized metal silicide film and the polysilicon film. According to the disclosed methods, the tungsten silicide film is crystallized by an annealing process and the polysilicon film and the crystallized tungsten suicide film are etched at one time to prevent any formation of recesses of the polysilicon film, so that it is possible to form the gate electrode pattern having the vertical profile.
1. A method of forming a gate electrode in a semiconductor, comprising:
forming a first polysilicon film for the floating gate electrode on a semiconductor substrate and a dielectric film on the first polysilicon film;
forming a second polysilicon film for the control gate electrode on the dielectric film and a tungsten silicide film on the second polysilicon film;
performing an annealing process to crystallize the tungsten silicide film;
performing a first etching process to etch the crystallized tungsten silicide film and the second polysilicon film under the crystallized tungsten silicide film at one time using the same etching gas after the annealing process; and,
performing a second etching process to etch the first polysilicon film for the floating gate electrode on a semiconductor substrate and the dielectric film on the first polysilicon film, thereby forming a gate electrode.
2. The method of forming a gate electrode in a semiconductor according to claim 1 , wherein the annealing process is one of a rapid thermal process (RTP) annealing process and a furnace annealing process for crystallizing an amorphous tungsten silicide film to form a crystalline tungsten silicide film.
3. The method of forming a gate electrode in a semiconductor according to claim 2 , comprising performing the RTP annealing process at a temperature ranging from about 900° C. to about 1000° C. for a time period ranging from about 10 seconds to about 30 seconds in an ambient atmosphere of N 2 or NH 3 gas, and performing the furnace annealing process at a temperature ranging from about 850° C. to about 1000° C. for a time period ranging from about 5 minutes to about 30 minutes in an ambient of N 2 or NH 3 gas.
4. The method of forming a gate electrode in a semiconductor-according to claim 1 , comprising performing the first etching process under a process condition for etching the second polysilicon film for the control gate electrode.
5. The method of forming a gate electrode in a semiconductor according to claim 4 , wherein the first etching process is a dry etching process, and comprising performing the first etching process in an inductively coupled plasma chamber into which a mixture gas of Cl 2 gas and O 2 gas is introduced.
6. The method of forming a gate electrode in a semiconductor according to claim 1 , wherein the first etching process is a dry etching process, and comprising performing the first etching process in an inductively coupled plasma chamber into which a mixture gas of Cl 2 gas and O 2 gas is introduced.
7. The method of forming a gate electrode in a semiconductor according to claim 1 , where in the annealing process results in the etch rate of the crystallized metal silicide film being similar to that of the second polysilicon film for the control gate electrode.
8. The method of forming a gate electrode in a semiconductor according to claim 1 , comprising forming the tungsten suicide film by reacting SiH 4 or SiH 2 Cl 2 with WF 6 at a stochiometric ratio of(SiH 4 or SiH 2 Cl 2 ): WF 6 of 2.0–2.8.