Formation of abrupt junctions in devices by using silicide growth dopant snowplow effect
View Patent ↗A method of forming an abrupt junction device with a semiconductor substrate is provided. A gate dielectric is formed on a semiconductor substrate, and a gate is formed on the gate dielectric. A sidewall spacer is formed on the semiconductor substrate adjacent the gate and the gate dielectric. A thickening layer is formed by selective epitaxial growth on the semiconductor substrate adjacent the sidewall spacer. Raised source/drain dopant implanted regions are formed in at least a portion of the thickening layer. Silicide layers are formed in at least a portion of the raised source/drain dopant implanted regions to form source/drain regions, beneath the silicide layers, that are enriched with dopant from the silicide layers. A dielectric layer is deposited over the silicide layers, and contacts are then formed in the dielectric layer to the silicide layers.
1. A device comprising:
a semiconductor substrate;
a gate dielectric on the semiconductor substrate;
a gate on the gate dielectric;
a sidewall spacer on the semiconductor substrate adjacent the gate and the gate dielectric;
an epitaxial thickening layer on the semiconductor substrate adjacent the sidewall spacer;
silicide layers in at least a portion of the epitaxial thickening layer;
source/drain regions, beneath the silicide layers, that are enriched with dopant from the silicide layers;
a dielectric layer over the silicide layers; and
contacts in the dielectric layer to the silicide layers.
2. The device as claimed in claim 1 wherein the epitaxial thickening layer and the adjacent top of the semiconductor substrate are dopant implanted regions.
3. The device as claimed in claim 1 wherein the silicide layers in the epitaxial thickening layer further comprise silicide layers formed by thermal silicidation of deposited metallic layers into a dopant implanted epitaxial thickening layer.
4. The device as claimed in claim 1 wherein the source/drain regions that are enriched with dopant from the silicide layers have a dopant profile that is steeper than the profile of dopant lacking enrichment from the silicide layers.
5. The device as claimed in claim 1 wherein the dopant is a material selected from a group consisting of arsenic, phosphorus, antimony, boron, indium, and a combination thereof.
6. The device as claimed in claim 1 wherein the silicide layers are a silicide of a metal selected from a group consisting of cobalt, nickel, titanium, hafnium, platinum, and a combination thereof.
7. A device comprising:
a semiconductor substrate;
a gate dielectric on the semiconductor substrate;
a gate on the gate dielectric;
a sidewall spacer on the semiconductor substrate adjacent the gate and the gate dielectric;
an epitaxial silicon thickening layer on the surface of the semiconductor substrate adjacent the sidewall spacer and the gate, the epitaxial thickening layer and the adjacent top of the semiconductor substrate being dopant implanted regions;
silicide layers in at least a portion of the epitaxial silicon thickening layer;
source/drain regions, beneath the silicide layers, that are enriched with dopant, from the silicide layers, that has a dopant profile that is steeper than the profile of dopant lacking enrichment from the silicide layers;
the dopant being a material selected from a group consisting of arsenic, phosphorus, antimony, boron, indium, and a combination thereof;
a silicide layer on the gate;
the silicide layers being a silicide of a metal selected from a group consisting of cobalt, nickel, titanium, hafnium, platinum, and a combination thereof;
a dielectric layer over the silicide layers; and
contacts in the dielectric layer to the silicide layers.
8. The device as claimed in claim 7 wherein the silicide layers in the epitaxial silicon thickening layer further comprise silicide layers formed by thermal silicidation of deposited metallic layers into a dopant implanted epitaxial silicon thickening layer.