Apparatus and method for time ordering events in a system having multiple time domains
View Patent ↗A system and method time orders events that occur in various portions of the system ( 10 ) where different time domains ( 12, 22, 32 ) exist. Timestamping circuitry (e.g. 40 ) is provided in each of a plurality of functional circuits or modules ( 14, 24, 34 ). The timestamping circuitry provides a message that indicates a point in time when a predetermined event occurs. An interface module ( 70 ) is coupled to each of the plurality of functional circuits ( 14, 24, 34 ). The interface module ( 70 ) provides control information to the plurality of functional circuits ( 14, 24, 34 ) to indicate at least one operating condition that triggers the predetermined event, and to optionally specify a message format. The interface module ( 70 ) provides a timestamping message from one, several or all time domains at a common interface port ( 90 ).
1. A system for time ordering events comprising:
a plurality of functional circuit modules, each functional circuit module being clocked by a clock that represents a different time domain, such that the plurality of functional circuit modules operate independently of each other with respect to time and each of the plurality of functional circuit modules having timestamping circuitry, the timestamping circuitry providing a timestamping message that indicates a point in time when a predetermined event occurs in a corresponding time domain out of a plurality of time domains; and
an interface module coupled to each of the plurality of functional circuit modules, the interface module providing control information to the plurality of functional circuit modules to indicate at least one operating condition that triggers the predetermined event, the interface module receiving at least the timestamping message when the predetermined event occurs.
2. The system of claim 1 wherein the interface module further comprises:
storage circuitry for storing the control information as programmable control information that determines the at least one operating condition that triggers the predetermined event.
3. The system of claim 2 wherein the at least one operating condition that triggers the predetermined event further comprises at least one of: entrance into or exit from a power mode of operation, a change in source of a clock, a change in clock periodicity, a predetermined change in a hardware counter value, entry into and exit from a debug mode of operation, and occurrence of at least one user programmable event.
4. The system of claim 1 wherein the timestamping circuitry further comprises:
a counter for determining either absolute or relative time in a corresponding functional circuit module;
time domain identification circuitry for providing a time domain identifier; and
clock status circuitry for providing one or more operating characteristics of a clock in the corresponding functional circuit module.
5. The system of claim 4 wherein the timestamping circuitry further comprises circuitry for generating a code to be included in each message to identify a format of information included in a corresponding message.
6. The system of claim 4 wherein the interface module further comprises an arbiter having circuitry for generating a code to be included in each timestamping message to identify a format of information included in a corresponding timestamping message.
7. The system of claim 1 wherein the timestamping message provided by at least one of the plurality of functional circuit modules has a format that comprises at least a time count value that is an absolute value referenced to a known starting value, status information of a clock signal associated with one of the functional circuit modules, and an identifier that indicates a corresponding time domain associated with the timestamping message.
8. The system of claim 7 wherein the timestamping message has a format that further comprises a field that identifies that the format of the timestamping message has an absolute value time count value.
9. The system of claim 1 wherein the timestamping message provided by at least one of the plurality of functional circuit modules has a format that comprises at least a time count value that is a relative value referenced to a last occurring predetermined event, status information of a clock signal associated with one of the functional circuit modules, and an identifier that indicates a corresponding time domain associated with the timestamping message.
10. The system of claim 9 wherein the timestamping message has a format that further comprises a field that identifies that the format of the timestamping message having a relative value time count value.
11. The system of claim 1 wherein the timestamping message has a format that comprises a time count value corresponding to each of the functional circuit modules and predetermined status information associated with each of the functional circuit modules when the predetermined event occurs.
12. The system of claim 1 wherein the control information is programmable.
13. The system of claim 1 wherein the interface module further comprises:
at least one register for storing the control information.
14. The system of claim 1 wherein the interface module provides timestamping messages from all time domains at a common interface port.
15. The system of claim 14 wherein the common interface port of the interface module meets IEEE ISTO 5001 (NEXUS) compliance.
16. A system for time ordering events comprising:
a plurality of functional circuit module means, each being clocked by a clock that represents a different time domain, such that the plurality of functional circuit modules operate independently of each other with respect to time and each of the plurality of functional circuit modules having timestamping circuit means, the timestamping circuit means providing a timestamping message that indicates a point in time when a predetermined event occurs in a corresponding time domain out of a plurality of time domains; and
interface module means coupled to each of the plurality of functional circuit module means, the interface module means providing control information to the plurality of functional circuit module means to indicate at least one operating condition that triggers the predetermined event, the interface module means receiving at least the timestamping message when the predetermined event occurs.
17. The system of claim 16 wherein the timestamping messages from all time domains are provided by interface module means at a common interface port means.
18. A system for time ordering events comprising:
a plurality of functional circuit modules, each functional circuit module being clocked by a clock that represents a different time domain, such that the plurality of functional circuit modules operate independently of each other with respect to time and each of the plurality of functional circuit modules having timestamping circuitry, the timestamping circuitry providing a timestamping message that indicates a point in time when a predetermined event occurs in a corresponding time domain out of a plurality of time domains, wherein the timestamping circuitry comprises:
a counter for determining either absolute or relative time in a corresponding functional circuit module,
time domain identification circuitry for providing a time domain identifier, and
clock status circuitry for providing one or more operating characteristics of a clock in the corresponding functional circuit module; and
an interface module coupled to each of the plurality of functional circuit modules, the interface module providing control information to the plurality of functional circuit modules to indicate at least one operating condition that triggers the predetermined event, the interface module receiving at least the timestamping message when the predetermined event occurs.
19. The system of claim 18 , wherein the interface module further comprises:
storage circuitry for storing the control information as programmable control information that determines the at least one operating condition that triggers the predetermined event.
20. The system of claim 18 , wherein the at least one operating condition that triggers the predetermined event further comprises at least one of: entrance into or exit from a power mode of operation, a change in source of a clock, a change in clock periodicity, a predetermined change in a hardware counter value, entry into and exit from a debug mode of operation, and occurrence of at least one user programmable event.
21. A system for time ordering events comprising:
a plurality of functional circuit modules, each functional circuit module being clocked by a clock that represents a different time domain, such that the plurality of functional circuit modules operate independently of each other with respect to time and each of the plurality of functional circuit modules having timestamping circuitry, the timestamping circuitry providing a timestamping message that indicates a point in time when a predetermined event occurs in a corresponding time domain out of a plurality of time domains, wherein the timestamping circuitry comprises:
a counter for determining either absolute or relative time in a corresponding functional circuit module,
time domain identification circuitry for providing a time domain identifier,
clock status circuitry for providing one or more operating characteristics of a clock in the corresponding functional circuit module, and
circuitry for generating a code to be included in the timestamping message to identify a format of information included in the timestamping message; and
an interface module coupled to each of the plurality of functional circuit modules, the interface module providing control information to the plurality of functional circuit modules to indicate at least one operating condition that triggers the predetermined event, the interface module receiving at least the timestamping message when the predetermined event occurs.