Reset signal generating circuit
View Patent ↗The present invention discloses a reset signal generating circuit including a power sensing stabilizing unit, a pull-up driving unit, a voltage adjusting unit, a feedback control unit, a pull-up control unit, a self pull-up bias unit and a self bias unit. The reset signal generating circuit generates a reset signal only when a power voltage reaches a predetermined level, regardless of a power-up slope. In addition, the reset signal generating circuit includes a temperature compensating circuit to compensate for variations of operation properties of the voltage adjusting unit due to variations of a temperature, thereby minimizing instability of generation of the reset signal due to variations of the temperature.
1. A reset signal generating circuit, comprising:
a power sensing stabilizing unit for sensing variations of a power voltage, and for outputting a signal proportional to variations of the power voltage until the power voltage reaches a specific level;
a voltage adjusting unit for dropping the power voltage to a predetermined level, and outputting a first power voltage;
a feedback control unit for controlling the output from the power sensing stabilizing unit according to the output from the voltage adjusting unit, and for generating a reset signal by pulling down the output signal from the power sensing stabilizing unit when the output from the voltage adjusting unit reaches the specific level;
a self pull-up driving unit for maintaining a pull-down state of the output from the power sensing stabilizing unit, by pulling up the output from the voltage adjusting unit to a second power voltage level according to a self bias gate voltage, after generation of the reset signal;
a self pull-up bias unit for outputting the self bias gate voltage according to variations of the power voltage; and
a self bias unit for dropping the self bias gate voltage at a specific self bias gate voltage level.
2. The circuit of claim 1 , wherein the voltage adjusting unit comprises:
a voltage dropping unit for dropping the power voltage by certain voltage units; and
a voltage micro-adjusting unit for adjusting the output from the voltage dropping unit by smaller units than the certain voltage units.
3. The circuit of claim 1 , wherein the self pull-up driving unit restricts current supply before the power voltage level is smaller than the specific self bias gate voltage level, and pulls up the output from the voltage adjusting unit by beginning to supply current after the power voltage level reaches the specific self bias gate voltage level.
4. The circuit of claim 3 , wherein the self pull-up bias unit outputs the power voltage value as the self bias gate voltage.
5. The circuit of claim 4 , wherein the self pull-up bias unit is one of a MOS capacitor and a diode.
6. The circuit of claim 1 , further comprising a temperature compensating circuit for transmitting a control signal whose magnitude is changed due to variations of a temperature to the voltage adjusting unit in order to compensate for output variations of the voltage adjusting unit due to variations of the temperature.
7. The circuit of claim 6 , wherein the voltage adjusting unit is formed by connecting at least one or more MOS transistors in parallel.
8. The circuit of claim 7 , wherein the temperature compensating circuit raises or drops gate voltages of the MOS transistors according to variations of the temperature.
9. The circuit of claim 8 , wherein, when the MOS transistors are PMOS transistors, the temperature compensating circuit transmits the output voltage proportional to variations of the temperature to the gate terminals of the PMOS transistors, and when the MOS transistors are NMOS transistors, the temperature compensating circuit transmits the output voltage inversely proportional to variations of the temperature to the gate terminals of the NMOS transistors.
10. The circuit of claim 9 , wherein the temperature compensating circuit comprises:
a temperature sensing voltage dropping unit for variably dropping the power voltage according to variations of the temperature, and for outputting a third power voltage to the voltage adjusting unit;
a voltage stabilizing unit for stabilizing the output from the temperature sensing voltage dropping unit by grounding at the initial stage of the operation; and
a voltage precharge unit for pulling down the output from the temperature sensing voltage dropping unit in precharge.
11. The circuit of claim 1 , further comprising a pull-up control unit for pulling up the output from the power sensing stabilizing unit at an initial stage of the operation, and outputting the output voltage from the power sensing stabilizing unit as the reset signal.
12. The circuit of claim 11 , wherein the voltage adjusting unit comprises:
a voltage dropping unit for dropping the power voltage by certain units; and
a voltage micro-adjusting unit for adjusting the output from the voltage dropping unit by smaller units than the certain voltage units.
13. The circuit of claim 12 , wherein the self pull-up driving unit restricts current supply before the power voltage level is smaller than the specific self bias gate voltage level, and pulls up the output from the voltage adjusting unit by beginning to supply current after the power voltage level reaches the specific self bias gate voltage level.
14. The circuit of claim 13 , wherein the self pull-up bias unit outputs a forth power voltage value as the self bias gate voltage.
15. The circuit of claim 14 , wherein the self pull-up bias unit is one of a MOS capacitor and a diode.
16. The circuit of claim 11 , further comprising a temperature compensating unit for transmitting a control signal whose magnitude is changed due to variations of a temperature to the voltage adjusting unit in order to compensate for output variations of the voltage adjusting unit due to variations of the temperature.
17. The circuit of claim 16 , wherein the voltage adjusting unit is formed by connecting at least one or more MOS transistors in parallel.
18. The circuit of claim 17 , wherein the temperature compensating circuit raises or drops gate voltages of the MOS transistors according to variations of the temperature.
19. The circuit of claim 18 , wherein, when the MOS transistors are PMOS transistors, the temperature compensating circuit transmits the output voltage proportional to variations of the temperature to the gate terminals of the PMOS transistors, and when the MOS transistors are NMOS transistors, the temperature compensating circuit transmits the output voltage inversely proportional to variations of the temperature to the gate terminals of the NMOS transistors.
20. The circuit of claim 19 , wherein the temperature compensating circuit comprises:
a temperature sensing voltage dropping unit for variably dropping the power voltage according to variations of the temperature, and for outputting the power voltage to the voltage adjusting unit;
a voltage stabilizing unit for stabilizing the output from the temperature sensing voltage dropping unit by grounding at the initial stage of the operation; and
a voltage precharge unit for pulling down the output from the temperature sensing voltage dropping unit in precharge.