IP Library › Assignment 067412/0482
Patent Assignment
Reel/Frame 067412/0482

CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE IS HYNIX SEMICONDUCTOR INC. NOT HYNIX-SEMICONDUCTOR INC. THERE IS NO HYPHEN IN THE NAME. PREVIOUSLY RECORDED ON REEL 67328 FRAME 814. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME.

Recorded: 2024-05-14 Received: 2024-05-14 Pages: 56
Assignor
HYNIX SEMICONDUCTOR INC.
Executed: 2012-07-30
Assignee
SK HYNIX INC.
2091 GYEONGCHUNGDAE-RO, BUBAL-EUP, ICHEON-SI, KRX, KOREA, REPUBLIC OF
Covered Applications (100)
NONVOLATILE MEMORY CELL, NONVOLATILE MEMORY DEVICE AND METHOD FOR DRIVING THE SAME
App. No. 13/619,672
→
NONVOLATILE MEMORY CELL, NONVOLATILE MEMORY DEVICE AND METHOD FOR DRIVING THE SAME
App. No. 13/619,926
→
NONVOLATILE MEMORY CELL, NONVOLATILE MEMORY DEVICE AND METHOD FOR DRIVING THE SAME
App. No. 13/619,771
→
INTERNAL VOLTAGE GENERATOR AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME
App. No. 13/592,902
→
SIGNAL DELAY CIRCUIT, CLOCK TRANSFER CONTROL CIRCUIT AND SEMICONDUCTOR DEVICE HAVING THE SAME
App. No. 13/552,037
→
METHOD FOR VERIFYING MASK PATTERN OF SEMICONDUCTOR DEVICE
App. No. 13/507,529
→
SEMICONDUCTOR DEVICE WITH BURIED BIT LINES AND METHOD FOR FABRICATING THE SAME
App. No. 13/541,213
→
METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE WITH A BIT LINE CONTACT HOLE
App. No. 13/494,923
→
NONVOLATILE MEMORY DEVICE
App. No. 13/488,897
→
METHOD FOR FABRICATING SEMICONDUCTOR MEMORY DEVICE
App. No. 13/478,625
→
NON-VOLATILE MEMORY DEVICE FOR STORING WRITE DATA HAVING DIFFERENT LOGIC LEVELS
App. No. 13/474,917
→
SEMICONDUCTOR PACKAGE HAVING SUBSTRATE FOR HIGH SPEED SEMICONDUCTOR PACKAGE
App. No. 13/465,274
→
NON-VOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME
App. No. 13/462,082
→
APPARATUS AND METHOD FOR PROCESSING INTENSITY OF IMAGE IN DIGITAL CAMERA
App. No. 13/458,159
→
DELAY LOCKED LOOP
App. No. 13/448,547
→
CHARGE TRAP TYPE NON-VOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME
App. No. 13/448,046
→
BUFFER CIRCUIT
App. No. 13/446,397
→
SEMICONDUCTOR MEMORY APPARATUS, AND SET PROGRAM CONTROL CIRCUIT AND PROGRAM METHOD THEREFOR
App. No. 13/445,755
→
SEMICONDUCTOR MEMORY DEVICE FOR IMPROVING REPAIR EFFICIENCY
App. No. 13/412,982
→
SEMICONDUCTOR INTEGRATED CIRCUIT
App. No. 13/411,727
→
INTERNAL NEGATIVE VOLTAGE GENERATION DEVICE
App. No. 13/409,379
→
SEMICONDUCTOR DEVICE
App. No. 13/406,936
→
PHASE CHANGE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
App. No. 13/404,481
→
SEMICONDUCTOR MEMORY DEVICE
App. No. 13/404,734
→
PHASE CHANGE MEMORY DEVICE HAVING BURIED CONDUCTION LINES DIRECTLY UNDERNEATH PHASE CHANGE MEMORY CELLS AND FABRICATION METHOD THEREOF
App. No. 13/402,164
→
COUNTING CIRCUIT OF SEMICONDUCTOR DEVICE AND DUTY CORRECTION CIRCUIT OF SEMICONDUCTOR DEVICE USING THE SAME
App. No. 13/366,425
→
DATA ALIGNMENT CIRCUIT
App. No. 13/356,977
→
ANTI-FUSE CONTROL CIRCUIT
App. No. 13/351,806
→
SEMICONDUCTOR MEMORY DEVICE FOR MINIMIZING MISMATCH OF SENSE AMPLIFIER
App. No. 13/347,450
→
CURRENT CONTROL CIRCUIT
App. No. 13/347,102
→
NONVOLATILE MEMORY DEVICE AND METHOD FOR OPERATING THE SAME
App. No. 13/347,064
→
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
App. No. 13/346,910
→
NONVOLATILE MEMORY DEVICE AND METHOD OF PROGRAMMING THE DEVICE
App. No. 13/344,349
→
SEMICONDUCTOR INTEGRATED CIRCUIT HAVING CAPACITOR FOR PROVIDING STABLE POWER AND METHOD OF MANUFACTURING THE SAME
App. No. 13/340,847
→
EMI SHIELDING CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING THE SAME
App. No. 13/340,885
→
MEMORY SYSTEM
App. No. 13/340,868
→
SEMICONDUCTOR MEMORY APPARATUS AND BIT LINE EQUALIZING CIRCUIT
App. No. 13/341,369
→
PHASE-CHANGE RANDOM ACCESS MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
App. No. 13/339,818
→
SIGNAL DELAY CIRCUIT
App. No. 13/339,206
→
MEMORY AND TEST METHOD FOR MEMORY
App. No. 13/338,591
→
SEMICONDUCTOR MEMORY DEVICE HAVING DATA COMPRESSION TEST CICUIT
App. No. 13/337,657
→
SEMICONDUCTOR PACKAGE HAVING INTERPOSER WITH OPENINGS CONTAINING CONDUCTIVE LAYER
App. No. 13/337,197
→
SYSTEM-IN PACKAGE INCLUDING SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR DETERMINING INPUT/OUTPUT PINS OF SYSTEM-IN PACKAGE
App. No. 13/336,933
→
REPAIR METHOD AND INTEGRATED CIRCUIT USING THE SAME
App. No. 13/336,906
→
INTERNAL VOLTAGE GENERATION CIRCUIT
App. No. 13/336,875
→
SEMICONDUCTOR DEVICE AND TESTING METHOD THEREOF
App. No. 13/333,715
→
SEMICONDUCTOR DEVICE AND TEST METHOD WITH BOUNDARY SCAN
App. No. 13/333,959
→
POWER-UP SIGNAL GENERATION CIRCUIT OF SEMICONDUCTOR APPARATUS
App. No. 13/333,090
→
SEMICONDUCTOR INTEGRATED CIRCUIT AND DATA READ METHOD
App. No. 13/333,158
→
TERMINATION CONTROL CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING THE SAME
App. No. 13/332,656
→
NONVOLATILE MEMORY APPARATUS AND WRITE CONTROL METHOD THEREOF
App. No. 13/331,196
→
PHASE CHANGE RANDOM ACCESS MEMORY AND METHOD FOR MANUFACTURING THE SAME
App. No. 13/331,758
→
PHASE-CHANGE RANDOM ACCESS MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
App. No. 13/326,490
→
SEMICONDUCTOR MEMORY DEVICE INCLUDING MODE REGISTER SET AND METHOD FOR OPERATING THE SAME
App. No. 13/325,141
→
METHOD FOR FABRICATING METAL PATTERN IN SEMICONDUCTOR DEVICE
App. No. 13/324,419
→
SEMICONDUCTOR MEMORY DEVICE
App. No. 13/313,828
→
NONVOLATILE MEMORY DEVICE
App. No. 13/310,329
→
SEMICONDUCTOR MEMORY DEVICE HAVING A FLOATING BODY CAPACITOR, MEMORY CELL ARRAY HAVING THE SAME AND METHOD OF MANUFACTURING THE SAME
App. No. 13/304,470
→
READOUT INTEGRATED CIRCUIT FOR INFRARED SIGNAL AND METHOD OF READING OUT INFRARED SIGNAL
App. No. 13/294,275
→
SEMICONDUCTOR MEMORY DEVICE HAVING IMPROVED ERASE CHARACTERISTIC OF MEMORY CELLS AND ERASE METHOD THEREOF
App. No. 13/293,391
→
POWER-UP SIGNAL GENERATING CIRCUIT OF SEMICONDUCTOR INTEGRATED CIRCUIT
App. No. 13/291,641
→
SEMICONDUCTOR MEMORY SYSTEM AND METHOD FOR DRIVING THE SAME
App. No. 13/288,284
→
SEMICONDUCTOR PACKAGE HAVING THROUGH ELECTRODES THAT REDUCE LEAKAGE CURRENT AND METHOD FOR MANUFACTURING THE SAME
App. No. 13/286,376
→
DELAY LOCKED LOOP
App. No. 13/285,088
→
FLEXIBLE SEMICONDUCTOR PACKAGE APPARATUS HAVING A RESPONSIVE BENDABLE CONDUCTIVE WIRE MEMBER AND A MANUFACTURING THE SAME
App. No. 13/241,455
→
SEMICONDUCTOR MEMORY APPARATUS
App. No. 13/241,924
→
PHASE CHANGE MEMORY DEVICE TO PREVENT THERMAL CROSS-TALK AND METHOD FOR MANUFACTURING THE SAME
App. No. 13/241,890
→
MEMORY DEVICE AND METHOD FOR OPERATING THE SAME
App. No. 13/238,435
→
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
App. No. 13/230,787
→
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
App. No. 13/230,776
→
SEMICONDUCTOR DEVICE CAPABLE OF SUPPRESSING A COUPLING EFFECT OF A TEST-DISABLE TRANSMISSION LINE
App. No. 13/229,086
→
METHOD FOR CORRECTING CRITICAL DIMENSION OF PHASE SHIFT MASK AND METHOD FOR MANUFACTURING THE SAME
App. No. 13/228,915
→
SHIFT CIRCUIT OF A SEMICONDUCTOR DEVICE
App. No. 13/220,983
→
SEMICONDUCTOR MEMORY APPARATUS HAVING A PRE-DISCHARGING FUNCTION, SEMICONDUCTOR INTEGRATED CIRCUIT HAVING THE SAME, AND METHOD FOR DRIVING THE SAME
App. No. 13/219,627
→
SEMICONDUCTOR MEMORY APPARATUS
App. No. 13/219,622
→
SEMICONDUCTOR APPARATUS
App. No. 13/219,649
→
ADDRESS DELAY CIRCUIT OF SEMICONDUCTOR MEMORY APPARATUS
App. No. 13/219,632
→
STACK PACKAGE HAVING REDUCED ELECTRICAL CONNECTION LENGTH SUITABLE FOR HIGH SPEED OPERATIONS AND METHOD OF MANUFACTURING THE SAME
App. No. 13/218,916
→
COMMAND BUFFER CIRCUIT OF SEMICONDUCTOR APPARATUS
App. No. 13/217,433
→
DELAY CONTROL CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME
App. No. 13/208,683
→
INTERNAL VOLTAGE GENERATING CIRCUIT
App. No. 13/191,801
→
DELAY LOCKED LOOP
App. No. 13/190,841
→
REFRESH CONTROL CIRCUIT, MEMORY APPARATUS AND REFRESH CONTROL METHOD USING THE SAME
App. No. 13/181,997
→
MEMORY SYSTEM AND METHOD OF OPERATING THE SAME
App. No. 13/180,912
→
NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME
App. No. 13/177,642
→
NONVOLATILE MEMORY DEVICE
App. No. 13/178,175
→
SEMICONDUCTOR DEVICE INCLUDING INNER INTERCONNECTION STRUCTURE ABLE TO CONDUCT SIGNALS OR VOLTAGES IN THE SEMICONDUCTOR CHIP WITH VERTICAL CONNECTION VIAS AND HORIZONTAL BURIED CONDUCTIVE LINES
App. No. 13/162,775
→
APPARATUS AND METHOD FOR COMPENSATING FOR BLACK LEVEL
App. No. 13/159,640
→
NON-VOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME
App. No. 13/159,841
→
CALIBRATING RESISTANCE FOR INTEGRATED CIRCUIT
App. No. 13/159,595
→
METAL LINE OF SEMICONDUCTOR DEVICE HAVING A DIFFUSION BARRIER WITH AN AMORPHOUS TABN LAYER AND METHOD FOR FORMING THE SAME
App. No. 13/152,665
→
SEMICONDUCTOR MEMORY DEVICE
App. No. 13/149,683
→
APPARATUS AND METHOD FOR TRANSMITTING/RECEIVING SIGNALS AT HIGH SPEED
App. No. 13/113,503
→
INTEGRATED CIRCUIT
App. No. 13/104,417
→
CONTROL VOLTAGE GENERATION CIRCUIT AND NON-VOLATILE MEMORY DEVICE INCLUDING THE SAME
App. No. 13/101,522
→
SEMICONDUCTOR MEMORY DEVICE
App. No. 13/100,906
→
STACKED SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME
App. No. 13/096,143
→
PROGRAM METHOD OF SEMICONDUCTOR MEMORY DEVICE
App. No. 13/096,733
→
FREQUENCY ADJUSTING APPARATUS AND DLL CIRCUIT INCLUDING THE SAME
App. No. 13/083,247
→
METHOD FOR FABRICATING STORAGE NODE OF SEMICONDUCTOR DEVICE
App. No. 13/073,348
→