IP Library Granted Patent US 6,908,805
Granted Patent B2
US 6,908,805 · App. 10/739,649 · Granted Jun 21, 2005

Method of manufacturing dual gate oxide film

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Quick Facts
Patent No.
US 6,908,805
App. No.
10/739,649
Granted
Jun 21, 2005
Kind
B2
Abstract

The present invention is provided to manufacture a dual gate oxide film. According to the present invention, it is possible to obtain a high-quality NO gate oxide film for high voltage and a high-quality NO gate oxide film for low voltage where nitrogen is distributed uniformly in the entire oxide films by carrying out a rapid annealing process in an inert atmosphere after carrying out an NO annealing process in order to prevent a phenomenon that nitrogen is not distributed uniformly and segregated in a gate oxide film for high voltage due to application of the NO annealing process after forming a gate oxide film for low voltage.

Claims (14)

1. A method of manufacturing a dual gate oxide film, comprising the steps of:

forming a first gate oxide film having a first thickness on a semiconductor substrate in which a high-voltage driving element region and a low-voltage driving element region are defined;

leaving the first gate oxide film only on the semiconductor substrate of the high-voltage driving element region;

forming a second gate oxide film having a thickness less than the first thickness on the semiconductor substrate of the low-voltage driving element region including the first gate oxide film;

carrying out an NO annealing process to diffuse nitrogen into the first and the second gate oxide films; and

carrying out a rapid annealing process to distribute the nitrogen uniformly in the first and the second gate oxide films, thereby forming an NO gate oxide film for a high voltage and an NO gate oxide film for a low voltage.

2. The method of manufacturing a dual gate oxide film according to claim 1 , wherein the first gate oxide film is formed using a pure oxide at an oxidation temperature of 750° C. to 850° C. to have a thickness of 300 Å to 500 Å.

3. The method of manufacturing a dual gate oxide film according to claim 1 , wherein the first gate oxide film is formed using an H 2 /O 2 /N 2 gas at an oxidation temperature of 750° C. to 850° C. to have a thickness of 300 Å to 500 Å, and then an N 2 annealing process is carried out thereto.

4. The method of manufacturing a dual gate oxide film according to claim 1 , wherein the second gate oxide film is formed using a pure oxide at an oxidation temperature of 750° C. to 850° C. to have a thickness of 60 Å to 100 Å.

5. The method of manufacturing a dual gate oxide film according to claim 1 , further comprising a step of carrying out an oxidation pre-cleaning process before the step of forming the second gate oxide film.

6. The method of manufacturing a dual gate oxide film according to claim 5 , wherein the oxidation pre-cleaning process is performed for 30 to 100 seconds, and a recipe thereof is composed of 50:1 to 100:1 (HF:H 2 O) HF+N(NH 4 OH:H 2 O 2 :H 2 O=1:4:20,25° C.).

7. The method of manufacturing a dual gate oxide film according to claim 5 , wherein the oxidation pre-cleaning process is carried out using a 100:1 to 300:1 BOE cleaning method.

8. The method of manufacturing a dual gate oxide film according to claim 1 , wherein the NO annealing process is carried out in-situ after the step of forming the second gate oxide film.

9. The method of manufacturing a dual gate oxide film according to claim 1 , wherein the rapid annealing process is carried out at a temperature of 500 ° C. to 700°C. for 15 to 50 seconds, in an inert atmosphere of argon.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 24, 2012
From: STMICROELECTRONICS S.R.L.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 029186/0761 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 11, 2011
From: NUMONYX B.V.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 027217/0837 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 11, 2011
From: HYNIX SEMICONDUCTOR INC.
To: NUMONYX B.V.
Reel/Frame 027217/0862 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2006
From: HYNIX SEMICONDUCTOR INC.
To: HYNIX SEMICONDUCTOR INC.; STMICROELECTRONICS S.R.L.
Reel/Frame 018207/0057 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 22, 2004
From: LEE, SEUNG C.; CHO, JUNG I.; PARK, SANG W.
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 015236/0303 →