IP Library Granted Patent US 6,864,126
Granted Patent B2
US 6,864,126 · App. 10/747,830 · Granted Mar 8, 2005

Methods of manufacturing semiconductor devices

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Quick Facts
Patent No.
US 6,864,126
App. No.
10/747,830
Granted
Mar 8, 2005
Kind
B2
Abstract

A method of manufacturing a semiconductor device with a transistor comprising an LDD region and a silicide layer is disclosed. The method may include forming a gate electrode on a substrate, forming a first preliminary source/drain region with shallow junction through an ion implantation process using the gate electrode as a mask, and forming a ILD pattern with contact holes on the substrate including the gate electrode, the contact holes exposing the top of the gate electrode and some part of the first preliminary source/drain region. The method may also include forming an expanded source/drain region through an ion implantation process using the ILD pattern as a mask, forming a silicide layer on the top of the gate electrode and the expanded source/drain region, and forming contact plugs by filling the contact holes with metal.

Claims (21)

1. A method for manufacturing a semiconductor device comprising:

forming a gate electrode on a substrate;

forming a first preliminary source/drain region with shallow junction in the substrate by performing ion implantation using the gate electrode as a mask;

forming an interlayer dielectric (ILD) pattern with contact holes over the substrate including the gate electrode and the first preliminary source/drain region, the contact holes exposing the top of the gate electrode and some part of the first preliminary source/drain region;

forming an expanded source/drain region by performing an ion implantation using the ILD pattern as a mask, the expanded source/drain region including the first preliminary source/drain region with shallow junction as the LDD region and a second preliminary source/drain region with deep junction;

forming a silicide layer on the top of the gate electrode and the expanded source/drain region; and

forming contact plugs by filling the contact holes with metal.

2. A method as defined by claim 1 , further comprising forming a nitride layer with a thickness between 250 Å and 350 Å over the substrate including the gate electrode.

3. A method as defined by claim 1 , further comprising forming a barrier metal layer on bottoms and sidewalls of the contact holes.

4. A method as defined by claim 1 , wherein the silicide layer is formed by:

forming a metal layer on the top of the gate electrode and the expanded source/drain region;

performing a first thermal treatment of the substrate including the metal layer, and

performing a second thermal treatment in situ of the resulting substrate.

5. A method as defined by claim 4 , wherein the metal layer is formed of at least one selected from the group consisting of a titanium layer, a titanium nitride layer, and a cobalt layer.

6. A method as defined by claim 4 , wherein the metal layer is a multi-layer comprising a titanium layer and a titanium nitride layer.

7. A method as defined by claim 6 , wherein the titanium layer has a thickness between 250 Å and 350 Å and the titanium nitride has a thickness between 100 Å and 200 Å.

8. A method as defined by claim 6 , wherein the metal layer is treated by first and second thermal treatment processes, the first thermal treatment process using a nitrogen gas for a time between 25 seconds and 35 seconds at a temperature between 700° C. and 740° C., the second thermal treatment process using a nitrogen gas for a time between 15 seconds and 25 seconds at a temperature between 800° C. and 840° C.

9. A method as defined by claim 4 , wherein the metal layer is a multi-layer comprising a cobalt layer, a titanium layer, and a titanium nitride layer.

10. A method as defined by claim 9 , wherein the cobalt layer has a thickness between 120 Å and 170 Å, the titanium layer has a thickness between 80 Åand 120 Å, and the titanium nitride layer has a thickness between 130 Å and 170 Å.

11. A method as defined by claim 9 , wherein the metal layer is treated by first and second thermal treatment processes, the first thermal treatment process using a nitrogen gas for a time between 50 seconds and 70 seconds at a temperature between 460° C. and 500° C., the second thermal treatment process using a nitrogen gas for a time between 25 seconds and 35 seconds at a temperature between 800° C. and 840° C.

12. A method as defined by claim 1 , wherein the contact plugs are formed of tungsten.

Assignments (3)
CHANGE OF NAME Recorded Jun 6, 2006
From: DONGBU ANAM SEMICONDUCTORS, INC
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 017718/0964 →
MERGER Recorded May 31, 2005
From: DONGBU SEMICONDUCTOR INC.
To: DONGBUANAM SEMICONDUCTOR, INC.
Reel/Frame 016593/0667 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 26, 2004
From: KIM, DAE KYEUN
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 014916/0327 →