Sensor semiconductor package and method of manufacturing the same

1. An integrated circuit package comprising:

a substrate having conductive traces therein, the substrate including a cavity therein;

a semiconductor die mounted to a first surface of the substrate, in a flip-chip orientation such that a sensor portion of said semiconductor die is aligned with said cavity and conductive interconnects connect pads of the semiconductor die to said conductive traces of said substrate;

an underfill material surrounding said interconnects;

a plurality of conductive balls disposed on said first surface of said substrate, said conductive balls being electrically connected to said conductive traces such that ones of said conductive balls are connected to ones of said pads of said semiconductor die via said conductive traces; and

an overmold material covering a back side of said semiconductor die and said plurality of conductive balls such that portions of said conductive balls are exposed.

2. The integrated circuit package according to claim 1 , wherein said semiconductor die is a micro electro-mechanical system integrated circuit chip.

3. The integrated circuit package according to claim 1 , further comprising a plurality of second level interconnects connected to the exposed portions of ones of said conductive balls.

4. The integrated circuit package according to claim 1 , further comprising a lid disposed on a second surface of said substrate and covering said sensor portion of said semiconductor die.

5. The integrated circuit package according to claim 1 , wherein said underfill comprises a polymeric encapsulant.

6. The integrated circuit package according to claim 1 , wherein said sensor portion of said semiconductor die is exposed to air.

7. The integrated circuit package according to claim 1 , wherein said sensor portion of said semiconductor die is covered with a polymeric material.

8. A process for fabricating an integrated circuit package, comprising:

providing a substrate having conductive traces therein, the substrate including a cavity therein;

mounting a semiconductor die to a first surface of the substrate, in a flip-chip orientation such that a sensor portion of said semiconductor die is aligned with said cavity and conductive interconnects connect pads of the semiconductor die to said conductive traces of said substrate;

filling an area surrounding said interconnects with an underfill material;

mounting a plurality of conductive balls on said first surface of said substrate and in electrical connection with said conductive traces such that ones of said conductive balls are connected to ones of said pads of said semiconductor die via said conductive traces; and

overmolding using an overmold material to cover a back side of said semiconductor die and said plurality of conductive balls such that portions of said conductive balls are exposed.

9. The process according to claim 8 , wherein mounting said semiconductor die comprises mounting a micro electro-mechanical system integrated circuit chip.

10. The process according to claim 8 , further comprising mounting a plurality of second level interconnects to the exposed portions of ones of said conductive balls.

11. The process according to claim 8 , further comprising mounting a lid on a second surface of said substrate such that said lid covers said sensor portion of said semiconductor die.

12. The process according to claim 8 , wherein filling an area surrounding said interconnects with an underfill material comprises filling said area with a polymeric encapsulant.

13. The process according to claim 8 , further comprising singulating said integrated circuit package from a remainder of a strip of gang-fabricated packages.

14. The process according to claim 8 , wherein said mounting the semiconductor die includes locating the conductive interconnects on to the semiconductor die and then attaching the die to the corresponding conductive pads on the substrate.