IP Library Granted Patent US 7,049,177
Granted Patent B1
US 7,049,177 · App. 10/765,192 · Granted May 23, 2006

Leadless plastic chip carrier with standoff contacts and die attach pad

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Quick Facts
Patent No.
US 7,049,177
App. No.
10/765,192
Granted
May 23, 2006
Kind
B1
Abstract

A process for fabricating a leadless plastic chip carrier includes selectively etching at least a first surface of a leadframe strip to partially define at least a plurality of contact pads and a die attach pad; selectively plating at least one layer of metal on a second surface of the leadframe strip, on an undersurface of at least the plurality of contact pads and the die attach pad; mounting a semiconductor die on the first surface, on the partially defined die attach pad; wire bonding the semiconductor die to ones of the contact pads; encapsulating the wire bonds and the semiconductor die in a molding material such that the molding material covers a first portion of the die attach pad and first portions of the contact pads; selectively etching a second surface of the leadframe strip to define a second portion of the contact pads and a second portion of the die attach pad by etching the second surface with the at least one layer of metal resisting etching; and singulating the leadless plastic chip carrier from the leadframe strip.

Claims (26)

1. A process for fabricating a leadless plastic chip carrier, comprising:

selectively etching at least a first surface of a leadframe strip to partially define at least a plurality of contact pads and a die attach pad;

selectively plating at least one layer of metal on a second surface of said leadframe strip, on an undersurface of at least said plurality of contact pads and said die attach pad;

selectively plating at least one layer of metal on said first surface of said leadframe strip including selectively plating said at least one layer of metal on only a peripheral portion of said die attach pad and plating said at least one layer of metal on a surface of said plurality of contact pads for facilitating wire bonding;

mounting a semiconductor die on said first surface, on the partially defined die attach pad;

wire bonding said semiconductor die to ones of said plurality of contact pads;

encapsulating said wire bonds and the semiconductor die in a molding material such that said molding material covers a first portion of said die attach pad and first portions of said plurality of contact pads;

selectively etching a second surface of said leadframe strip to define a second portion of said plurality of contact pads and a second portion of said die attach pad by etching said second surface with said at least one layer of metal resisting etching; and

singulating said leadless plastic chip carrier from said leadframe strip.

2. The process for fabricating a leadless plastic chip carrier according to claim 1 , wherein said selectively plating said at least one layer of metal on said first surface and said selectively plating said at least one layer of metal on said second surface is carried out in a single plating step.

3. The process for fabricating a leadless plastic chip carrier according to claim 1 , further comprising coating all exposed surfaces of said second portion of said die attach pad and said second portion of said plurality of contact pads for oxidation protection.

4. The process for fabricating a leadless plastic chip carrier according to claim 3 wherein coating comprises dipping at least a portion of said leadless plastic chip carrier in at least one of tin, solder dipping, and organic surface protection.

5. The process for fabricating a leadless plastic chip carrier according to claim 1 wherein said at least one layer of metal is selected from the group consisting of a layer of silver, layers of nickel and gold, and layers of nickel and palladium.

6. The process for fabricating a leadless plastic chip carrier according to claim 1 , wherein said step of selectively plating further includes selectively plating a perimeter portion of said leadframe strip for providing package rigidity, said perimeter portion being removed by said singulating.

7. A process for fabricating a leadless plastic chip carrier, comprising:

selectively etching a first surface and a second surface of a leadframe strip to define at least a plurality of contact pads and a die attach pad joined together by remaining portions of metal between etched away portions;

selectively plating at least one layer of metal on said first surface of said leadframe strip and on a second surface of said leadframe strip, on an undersurface of at least said plurality of contact pads and said die attach pad;

mounting a semiconductor die on said first surface, on the die attach pad;

wire bonding said semiconductor die to ones of said plurality of contact pads;

encapsulating said wire bonds and the semiconductor die in a molding material such that said molding material covers a first portion of said die attach pad and first portions of said plurality of contact pads;

further selectively etching to remove said remaining portions of metal between said etched away portions to isolate said plurality of contact pads and said die attach pad; and

singulating said leadless plastic chip carrier from said leadframe strip.

8. The process for fabricating a leadless plastic chip carrier according to claim 7 , further comprising coating a second portion of said die attach pad and a second portion of said plurality of contact pads for oxidation protection.

9. The process for fabricating a leadless plastic chip carrier according to claim 8 , wherein coating comprises dipping at least a portion of said leadless plastic chip carrier in an organic surface protection material.

10. The process for fabricating a leadless plastic chip carrier according to claim 7 wherein said at least one layer of metal is selected from the group consisting of a layer of silver, layers of nickel and gold, and layers of nickel and palladium.

11. The process for fabricating a leadless plastic chip carrier according to claim 7 , wherein said step of selectively plating further includes selectively plating a perimeter portion of said leadframe strip for providing package rigidity, said perimeter portion being removed by said singulating.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE ADD ANNEX INADVERTENTLY LEFT OUT ORIGINAL ASSIGNMENT DOCUMENT PREVIOUSLY RECORDED AT REEL: 037880 FRAME: 0534. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jul 8, 2016
From: UTAC HONG KONG LIMITED
To: UTAC HEADQUARTERS PTE. LTD.
Reel/Frame 039822/0591 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 23, 2016
From: UTAC HONG KONG LIMITED
To: UTAC HEADQUARTERS PTE. LTD.
Reel/Frame 037880/0534 →
CHANGE OF NAME Recorded Oct 29, 2010
From: ASAT LIMITED
To: UTAC HONG KONG LIMITED
Reel/Frame 025217/0356 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS - SECOND PRIORITY Recorded Jun 29, 2010
From: UTAC HONG KONG LIMITED
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024599/0827 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS - FIRST PRIORITY Recorded Jun 29, 2010
From: UTAC HONG KONG LIMITED
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024599/0743 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS - SECOND PRIORITY Recorded Jun 29, 2010
From: UTAC HONG KONG LIMITED
To: THE HONGKONG AND SHANGHAI BANKING CORPORATION LIMITED, AS SECURITY AGENT
Reel/Frame 024611/0097 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2004
From: FAN, CHUN HO; LAU, WING HIM; KWAN, KENNETH; WONG, JANET
To: ASAT LTD.
Reel/Frame 014888/0409 →