IP Library Granted Patent US 7,332,763
Granted Patent B1
US 7,332,763 · App. 10/765,316 · Granted Feb 19, 2008

Selective coupling of voltage feeds for body bias voltage in an integrated circuit device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,332,763
App. No.
10/765,316
Granted
Feb 19, 2008
Kind
B1
Abstract

An integrated circuit device having a body bias voltage mechanism. The integrated circuit comprises a resistive structure disposed therein for selectively coupling either an external body bias voltage or a power supply voltage to biasing wells. A first pad for coupling with a first externally disposed pin can optionally be provided. The first pad is for receiving an externally applied body bias voltage. Circuitry for producing a body bias voltage can be coupled to the first pad for coupling a body bias voltage to a plurality of biasing wells disposed on the integrated circuit device. If an externally applied body bias voltage is not provided, the resistive structure automatically couples a power supply voltage to the biasing wells. The power supply voltage may be obtained internally to the integrated circuit.

Claims (20)

1. An integrated circuit comprising:

a body bias distribution circuit;

a pad coupled to said body bias distribution circuit, said pad for receiving an externally applied voltage;

an internal voltage bus; and

a circuit component coupled to said internal voltage bus and coupled to said body bias distribution circuit, wherein said internal voltage bus supplies a body bias voltage to said distribution circuit absent a voltage applied to said pad.

2. An integrated circuit as described in claim 1 wherein said externally applied voltage is substantially applied to said distribution circuit when said externally applied voltage is applied to said pad.

3. An integrated circuit as described in claim 2 wherein said circuit component is a resistor element.

4. An integrated circuit as described in claim 2 further comprising an external pin coupled to said pad, said external pin for coupling with said externally supplied voltage.

5. An integrated circuit as described in claim 2 wherein said internal voltage bus is coupled to a power supply voltage of said integrated circuit.

6. An integrated circuit as described in claim 1 further comprising a plurality of metal oxide semiconductor transistors coupled to said body bias distribution circuit.

7. An integrated circuit as described in claim 6 wherein said plurality of metal oxide semiconductor transistors are coupled to said distribution circuit via respective body terminals.

8. A method of providing a body bias voltage in a semiconductor device comprising:

responsive to a coupling of an external body bias voltage to said semiconductor device, coupling said body bias voltage to body biasing wells of said semiconductor device; and

responsive to an absence of said external body bias voltage, automatically supplying said body biasing wells of said semiconductor device with an internal voltage of said semiconductor device through a resistance.

9. The method of claim 8 wherein said internal voltage is a power supply voltage for said semiconductor device.

10. The method of claim 8 wherein said internal voltage is a ground reference for said semiconductor device.

11. The method of claim 8 wherein said resistive structure comprises an n well region.

12. The method of claim 8 wherein said resistive structure forms a desired resistance between said internal voltage and said n well channels.

13. The method of claim 12 wherein said desired resistance is about 1 kilo ohm.

14. The method of claim 8 wherein said resistance is at least about one hundred times as large as a resistance of said coupling of said body bias voltage to said body biasing wells of said semiconductor device.

Assignments (11)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2022
From: QUEST PATENT RESEARCH CORPORATION
To: DEEPWELL IP LLC
Reel/Frame 059654/0315 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2022
From: INTELLECTUAL VENTURES ASSETS 174 LLC
To: QUEST PATENT RESEARCH CORPORATION
Reel/Frame 059649/0779 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2022
From: INTELLECTUAL VENTURES HOLDING 81 LLC
To: INTELLECUTAL VENTURES ASSETS 174 LLC
Reel/Frame 058881/0459 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 19, 2021
From: BURR, JAMES B.
To: TRANSMETA CORPORATION
Reel/Frame 056905/0260 →
MERGER Recorded Jul 19, 2021
From: INTELLECTUAL VENTURE FUNDING LLC
To: INTELLECTUAL VENTURES HOLDING 81 LLC
Reel/Frame 056905/0392 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR'S NAME PREVIOUSLY RECORDED AT REEL: 036711 FRAME: 0160. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 6, 2015
From: INTELLECTUAL VENTURES FUNDING LLC
To: INTELLECTUAL VENTURES HOLDING 81 LLC
Reel/Frame 036797/0356 →
MERGER Recorded Sep 29, 2015
From: INTELLECTUAL VENTURE FUNDING LLC
To: INTELLECTUAL VENTURES HOLDING 81 LLC
Reel/Frame 036711/0160 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2009
From: TRANSMETA LLC
To: INTELLECTUAL VENTURE FUNDING LLC
Reel/Frame 023268/0771 →
MERGER Recorded Mar 26, 2009
From: TRANSMETA CORPORATION
To: TRANSMETA LLC
Reel/Frame 022454/0522 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 12, 2004
From: FU, ROBERT
To: TRANSMETA CORPORATION
Reel/Frame 015550/0851 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 26, 2004
From: BURR, JAMES B.
To: TRANSMETA CORPORATION
Reel/Frame 014935/0567 →