IP Library Granted Patent US 7,030,793
Granted Patent B2
US 7,030,793 · App. 10/781,063 · Granted Apr 18, 2006

Accurate testing of temperature measurement unit

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Quick Facts
Patent No.
US 7,030,793
App. No.
10/781,063
Granted
Apr 18, 2006
Kind
B2
Abstract

Various embodiments of a method and apparatus for simulating temperature characteristics of a diode are disclosed. The output of a diode simulator may not depend upon its ambient temperature. Therefore, it may be used to calibrate a temperature measurement unit at any ambient temperature within its operational range regardless of the temperature to which the temperature measurement unit is to be calibrated. Even if the ambient temperature of the facility in which the calibration is performed varies during the calibration procedure, the output of the diode simulator may remain constant. These characteristics of the diode simulator may allow for calibration of a temperature measurement unit in significantly less time than by using prior art methods, which include the requirement to tightly control the temperature of one or more system components.

Claims (30)

1. A device, comprising:

a current level detector; and

a voltage level generator coupled to the current level detector;

wherein the current level detector is configured to produce an output current equal to an input current, and a logic-level signal that tracks changes in the input current;

wherein the voltage level generator is configured to produce an output voltage in response to both the logic-level signal and desired temperature input data; and

wherein the output voltage approximates the voltage drop across a diode passing the input current at a temperature corresponding to the desired temperature input data.

2. The device of claim 1 , wherein the current level detector comprises:

a first resistor coupled between an input node and an output node configured to produce an input voltage proportional to an input current;

a constant current source, whose output is coupled to the input node, configured to output a reference current;

a constant current sink configured to sink the reference current;

a second resistor, coupled between the output of the current source and the input of the current sink, and configured to produce a reference voltage proportional to the reference current; and

a comparator whose negative input is coupled to the output node and whose positive input is coupled to the input of the current sink, configured to output a logic low level when the input current is less than the reference current and a logic high level when the input current is greater than the reference current.

3. The device of claim 1 , wherein the voltage level generator comprises:

a first and second resistor coupled in series between an input node and an output node;

a constant current source, whose output is coupled to the input node, configured to output a reference current plus a reference current for a digital-to-analog converter (DAC);

a constant current sink coupled to the output node, configured to sink the reference current through the first and second resistors such that the voltage drop from the input node to the output node due to this reference current is approximately equal to the voltage drop across a diode; and

a DAC whose reference current is provided by the constant current source and whose output is coupled to the node connecting the first and second resistors, configured to receive desired temperature input data and an indication of the level of an input current;

wherein when the input current is at a high level, the DAC sinks current additional to the reference current through the first resistor proportional to the value of the desired input temperature data, causing a proportionate increase in the voltage drop across the first resistor and the same increase in the voltage drop between the input and output nodes; and

wherein when the input current is at a low level, the DAC sinks no additional current through the first resistor and therefore, does not alter the voltage drop between the input and output nodes.

4. A system, comprising:

a temperature measurement unit, also referred to as a device under test (DUT) configured to output a bi-level current signal; and

the device as recited in claim 1 , which may be referred to as a diode simulator, configured to receive the current signal from the DUT along with desired temperature input data, and further configured to output a voltage signal to the DUT;

wherein the output voltage signal from the diode simulator approximates a voltage drop across a diode passing the input current at a temperature corresponding to the value of the desired temperature input data.

5. The system of claim 4 , wherein while the DUT is being calibrated for a given temperature, both the diode simulator and the DUT are at ambient temperatures other than the given calibration temperature.

6. The system of claim 4 , wherein while the DUT is being calibrated for a given temperature, both the diode simulator and the DUT are at a same ambient temperature that is different from the given calibration temperature.

7. The system of claim 4 , wherein while the DUT is being calibrated for a range of temperatures, both the diode simulator and the DUT are at ambient temperatures other than the calibration temperatures.

8. The system of claim 4 , wherein while the DUT is being calibrated for a range of temperatures, both the diode simulator and the DUT are at a same ambient temperature.

9. The system of claim 4 , wherein the DUT is calibrated for a range of temperatures without controlling the ambient temperatures of the diode simulator or the DUT.

10. The system of claim 4 , wherein the DUT is calibrated for a range of temperatures while the ambient temperature of the diode simulator and the DUT is standard temperature.

11. The system of claim 4 , wherein the time required to calibrate the DUT for a temperature or range of temperatures is much less than that using prior art methods and devices due to the requirement of the prior art to tightly control the ambient temperature of one or more system components.

Assignments (10)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
MERGER Recorded Dec 11, 2017
From: STANDARD MICROSYSTEMS CORPORATION
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 044820/0715 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 18, 2004
From: MCLEOD, SCOTT C.; CASTELLANO, WILLIAM
To: STANDARD MICROSYSTEMS CORPORATION
Reel/Frame 014999/0445 →