System and method for reducing heat dissipation during burn-in

1. An apparatus for burn-in testing comprising:

a plurality of devices under test, each device under test subject to a body bias voltage;

a voltage supply for providing said body bias voltage to said devices under test, wherein said body bias voltage is selected from information comprising leakage current values indexed by body bias voltage values and wherein said body bias voltage is selected to substantially minimize leakage current associated with said devices under test; and

a wiring board for coupling said devices under test and said voltage supply.

2. The apparatus of claim 1 wherein said body bias voltage is selected to achieve a desired junction temperature at said devices under test.

3. The apparatus of claim 1 further comprising a test controller coupled to said devices under test via said wiring board.

4. The apparatus of claim 1 further comprising a second voltage supply for providing an operating voltage to said devices under test.

5. The apparatus of claim 1 wherein said devices under test comprise positive-channel metal-oxide semiconductor (PMOS) devices.

6. The apparatus of claim 5 wherein said body bias voltage is in the range of approximately zero to five volts.

7. The apparatus of claim 1 wherein said devices under test comprise negative-channel metal-oxide semiconductor (NMOS) devices.

8. The apparatus of claim 7 wherein said body bias voltage is in the range of approximately zero to minus ten volts.

9. A method of burn-in testing of a plurality of devices under test, said method comprising:

applying an operating voltage to said devices under test; and

applying a body bias voltage to said devices under test, wherein said body bias voltage is selected from information comprising leakage current values indexed by body bias voltage values and wherein application of said body bias voltage substantially minimizes leakage current associated with said devices under test.

10. The method of claim 9 wherein said body bias voltage is selected to achieve a desired junction temperature at said devices under test.

11. The method of claim 9 wherein said devices under test comprise positive-channel metal-oxide semiconductor (PMOS) devices.

12. The method of claim 11 wherein said body bias voltage is in the range of approximately zero to five volts.

13. The method of claim 9 wherein said devices under test comprise negative-channel metal-oxide semiconductor (NMOS) devices.

14. The method of claim 13 wherein said body bias voltage is in the range of approximately zero to minus ten volts.

15. A method of burn-in testing of a plurality of devices under test, said method comprising:

accessing a store of information comprising leakage current indexed by body bias voltage;

selecting a body bias voltage that substantially minimizes leakage current associated with said devices under test; and

applying said body bias voltage to said devices under test in addition to an operating voltage applied to said devices under test.

16. The method of claim 15 wherein said operating voltage in combination with said body bias voltage achieves a desired junction temperature at said devices under test.

17. The method of claim 15 wherein said devices under test comprise positive-channel metal-oxide semiconductor (PMOS) devices.

18. The method of claim 17 wherein said body bias voltage is in the range of approximately zero to five volts.

19. The method of claim 15 wherein said devices under test comprise negative-channel metal-oxide semiconductor (NMOS) devices.

20. The method of claim 19 wherein said body bias voltage is in the range of approximately zero to minus ten volts.