Mold die for a semiconductor device
View Patent ↗A technology is provided that can seal the opening in a wiring board using a transfer mold insulating resin from the opening. A mold die is used which includes a first die having a recess in a predetermined form and a second flat die. The first die is disposed on a surface of a wiring board which has a plurality of openings and on which a semiconductor chip is mounted via an elastic material. The second die is disposed on a back surface of the wiring board opposite the surface on which the semiconductor chip is mounted. The mold is used for sealing with an insulating resin the periphery of the semiconductor chip and at least one of the openings of the wiring board, wherein the above-described second die has a protrusion around an area overlapping the opening to be sealed with the insulating resin.
1. A mold die comprising a first die having a recess of a predetermined form and a second flat die, said first die to be disposed on a surface of a wiring board which has a plurality of openings including a bonding opening and a semiconductor chip mounted on said surface via an elastic material, and said second die to be disposed on a back of said surface of said wiring board on which said semiconductor chip is mounted, for sealing with an insulating resin a periphery of said semiconductor chip and at least said bonding opening of said wiring board, wherein
said second die comprises a loop-shaped protrusion disposed in a loop surrounding an area overlapping said bonding opening to be sealed with said insulating resin and has generally flat plate-shape surfaces in areas within and outside said loop-shaped protrusion recessed from said loop-shaped protrusion, said loop-shaped protrusion being configured to press said wiring board toward said semiconductor chip around said area overlapping said bonding opening.
2. The mold die according to claim 1 , wherein said wiring board has a conductive pattern electrically connected to an external electrode of said semiconductor chip in said bonding opening.
3. The mold die according to claim 2 , wherein the flat shape-surface area within the loop-shaped protrusion has a height the same as a height of the flat plate-shape surface area outside the loop-shaped protrusion.
4. The mold die according to claim 2 , wherein the second die includes a recess provided within the loop-shaped protrusion such that a height of the flat plate-shape surface area within the loop-shaped protrusion has a height further recessed from a top of the loop-shaped protrusion that the flat plate-shape surface area outside the loop-shaped protrusion.
5. The mold die according to claim 1 , wherein the flat shape-surface area within the loop-shaped protrusion has a height the same as a height of the flat plate-shape surface area outside the loop-shaped protrusion.
6. The mold die according to claim 1 , wherein the second die includes a recess provided within the loop-shaped protrusion such that a height of the flat plate-shape surface area within the loop-shaped protrusion has a height further recessed from a top of the loop-shaped protrusion that the flat plate-shape surface area outside the loop-shaped protrusion.
7. A method for manufacturing a semiconductor device by sealing, by transfer mold processing using a die, a semiconductor chip mounted on a wiring board via an elastic material, wherein said wiring board includes an insulating substrate with a plurality of openings including a bonding opening thereon on which a conductive pattern is formed, and by sealing at least said bonding opening, wherein
a die having a loop-shaped protrusion disposed in a loop surrounding an area overlapping said bonding opening to be sealed and has generally flat plate-shape surfaces in areas within and outside said loop-shaped protrusion recessed from said loop-shaped protrusion is used for a back die member to be placed in contact with the surface of said wiring board on the opposite side on which said semiconductor chip is mounted, and during said sealing, said loop-shaped protrusion presses said wiring board toward said semiconductor chip around said area overlapping said bonding opening.
8. The method according to claim 7 , wherein said wiring board has a conductive pattern electrically connected to an external electrode of said semiconductor chip in said bonding opening.
9. The method according to claim 8 , wherein the flat shape-surface area within the loop-shaped protrusion has a height the same as a height of the flat plate-shape surface area outside the loop-shaped protrusion.
10. The method according to claim 8 , wherein the second die includes a recess provided within the loop-shaped protrusion such that a height of the flat plate-shape surface area within the loop-shaped protrusion has a height further recessed from a top of the loop-shaped protrusion that the flat plate-shape surface area outside the loop-shaped protrusion.
11. The mold die according to claim 7 , wherein the flat shape-surface area within the loop-shaped protrusion has a height the same as a height of the flat plate-shape surface area outside the loop-shaped protrusion.
12. The method according to claim 2 , wherein the second die includes a recess provided within the loop-shaped protrusion such that a height of the flat plate-shape surface area within the loop-shaped protrusion has a height further recessed from a top of the loop-shaped protrusion that the flat plate-shape surface area outside the loop-shaped protrusion.