Semiconductor device including air gap between semiconductor substrate and L-shaped spacer and method of fabricating the same
A semiconductor device includes source/drain regions, a gate pattern disposed on the semiconductor substrate between the source/drain regions, and L-shaped spacers that are used as masks in the forming of the source/drain regions. The L-shaped spacers each include a vertical portion covering a side wall of the gate pattern, and a lateral portion extending from the bottom of the vertical portion over the source/drain region. Support portions interposed between the L-shaped spacers and the gate pattern support the lateral portions of the L-shaped spacers such that an air gap is defined between at least the lateral portions of the L-shaped spacers and the source/drain regions. The air gap minimizes the parasitic capacitance associated with the gate electrode of the semiconductor device.
1. A semiconductor device comprising:
a semiconductor substrate having source/drain regions spaced from each other;
a gate pattern disposed on the semiconductor substrate between the source/drain regions, said gate pattern having opposite side walls;
L-shaped spacers each including a vertical portion covering a respective one of the side walls of the gate pattern, and a lateral portion extending laterally from the bottom of the vertical portion over a respective one of the source/drain regions, whereby the bottom surface of each L-shaped spacer at the underside of the lateral portion faces the substrate; and
support portions interposed between said L-shaped spacers and the gate pattern, said support portions supporting said L-shaped spacers such that the lateral portion of each of the L-shaped spacers is spaced above the source/drain region over which the L-shaped spacer extends, and wherein an air gap exists between the lateral portion of each of the L-shaped spacers and the source/drain region over which the lateral portion extends, the entire bottom surface of the L-shaped spacer being exposed and delimiting the air gap.
2. The semiconductor device according to claim 1 , wherein the source/drain region comprises a lightly-doped source/drain region over which the lateral portion of one of said L-shaped spacers extends, and highly-doped source/drain region disposed laterally of the lateral portion of the L-shaped spacer.
3. The semiconductor device according to claim 1 , wherein said L-shaped spacers comprise an oxide layer.
4. The semiconductor device according to claim 1 , wherein said support portions comprise a polysilicon layer or a nitride layer.
5. The semiconductor device according to claim 1 , and further comprising a buffer insulating layer interposed between said gate pattern and said support portions.
6. A semiconductor device comprising:
a semiconductor substrate having source/drain regions spaced from each other;
a gate pattern disposed on the semiconductor substrate between the source/drain regions, said gate pattern having opposite side walls;
L-shaped spacers each including a vertical portion covering a respective one of the side walls of the gate pattern, and a lateral portion extending laterally from the bottom of the vertical portion over a respective one of the source/drain regions; and
support portions interposed between said L-shaped spacers and the gate pattern, said support portions supporting said L-shaped spacers such that the lateral portion of each of the L-shaped spacers is spaced above the source/drain region over which the L-shaped spacer extends, and wherein an air gap exists between the lateral portion of each of the L-shaped spacers and the source/drain region over which the lateral portion extends, and
wherein the source/drain regions include lightly-doped source drain regions, respectively, and the gate pattern and said support portions are disposed over a region of the substrate confined between the lightly-doped source/drain regions.
7. The semiconductor device according to claim 6 , wherein said source/drain regions include highly-doped source/drain regions disposed laterally of the lateral portions of the L-shaped spacers, respectively.
8. The semiconductor device according to claim 6 , wherein said L-shaped spacers comprise an oxide layer.
9. The semiconductor device according to claim 6 , wherein said support portions comprise a polysilicon layer or a nitride layer.
10. The semiconductor device according to claim 1 , and further comprising a buffer insulating layer interposed between said gate pattern and said support portions.