IP Library Granted Patent US 7,123,041
Granted Patent B2
US 7,123,041 · App. 10/809,322 · Granted Oct 17, 2006

LSI inspection method and defect inspection data analysis apparatus

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Quick Facts
Patent No.
US 7,123,041
App. No.
10/809,322
Granted
Oct 17, 2006
Kind
B2
Abstract

The present invention provides an LSI inspection method and a defect inspection data analysis apparatus capable of shortening a time needed for a wafer test. In a first database 11 is stored inspection data obtained when each defect inspection apparatus 20 inspects a wafer for defects in the front-end process. In a second database 12 are stored non-conforming article judgment criteria for each predetermined type of defect, according to which a non-conforming chip is judged. A defective chip identifying portion 16 identifies a chip having a defect and identifies the type of defect for each defect that the identified chip has, on the basis of the inspection data. For each identified chip, a non-conforming chip judging portion 17 judges whether the chip is a non-conforming article or not according to the non-conforming article judgment criteria corresponding to the type of defect for each defect, and obtains position information within the wafer surface of a chip judged as being a non-conforming article. The position information thus obtained is transmitted to an LSI inspection apparatus 30 via a transmission portion 15.

Claims (9)

1. A defect inspection data analysis apparatus, comprising:

a first storage means to store inspection data obtained by inspecting a wafer for a defect by means of a defect inspection apparatus after processing is performed in each of predetermined process steps among a plurality of process steps in a front-end process;

a second storage means to store non-conforming article judgment criteria, which are set for each predetermined type of defect on the basis of design data of the wafer, and according to which whether a chip formed on the wafer is a non-conforming article or not is judged;

a defective chip identifying means to identify, after the front-end process is completed, a chip having a defect among all chips formed on the wafer and to determine a type of defect for each defect that the identified chip has, on the basis of the inspection data stored in said first storage means;

a non-conforming chip judging means to read out, from said second storage means and for each chip identified by said defective chip identifying means, the non-conforming article judgment criteria corresponding to the type of defect for each defect that the chip has, then to judge whether the chip is a non-conforming article or not according to the read out non-conforming article judgment criteria, and to obtain position information within a surface of the wafer of a chip judged as being a non-conforming article; and

a third storage means to store the position information within the surface of the wafer of each chip judged as being a non-conforming article by said non-conforming chip judging means.

2. The defect inspection data analysis apparatus according to claim 1 , further comprising:

a transmission means to transmit the position information stored in said third storage means to a test apparatus that tests an electric property of each chip formed on the wafer.

3. The defect inspection data analysis apparatus according to claim 1 or 2 , wherein the non-conforming article judgment criteria for particular types of defects include criteria according to which a defect that causes a malfunction is judged, and criteria according to which a potential defect is judged.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 18, 2013
From: UMC JAPAN
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 029820/0811 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2004
From: HATA, YOJI
To: UMC JAPAN
Reel/Frame 015159/0928 →