IP Library Granted Patent US 7,152,319
Granted Patent B2
US 7,152,319 · App. 10/811,817 · Granted Dec 26, 2006

Method of making high speed circuit board

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Quick Facts
Patent No.
US 7,152,319
App. No.
10/811,817
Granted
Dec 26, 2006
Kind
B2
Abstract

A multilayered PCB including two multilayered portions, one of these able to electrically connect electronic components mounted on the PCB to assure high frequency connections therebetween. The PCB further includes a conventional PCB portion to reduce costs while assuring a structure having a satisfactory overall thickness for use in the PCB field. Coupling is also possible to the internal portion from these components. Methods of making these structures have also been provided.

Claims (22)

1. A method of making a printed circuit board, said method comprising:

providing a first multilayered portion including at least one dielectric layer having a dielectric constant and at least one conductive plane wherein said conductive plane includes signal lines capable of having signals pass there-along at a first frequency; and

providing a second multilayered portion adapted for having a plurality of electronic components electrically coupled thereto, said second multilayered portion including at least one dielectric layer having a dielectric constant lower than said dielectric constant of said first dielectric layer and at least one conductive signal plane wherein said conductive signal plane of said second multilayered portion includes signal lines capable of having signals pass there-along at a higher frequency than said first frequency to thereby provide a high speed connection between at least two of said electrical components; and

bonding said first and second multilayered portions together.

2. The method of claim 1 further including providing a conductive through hole within said second multilayered portion prior to said bonding of said first and second multilayered portions.

3. The method of claim 1 wherein said bonding is accomplished by lamination.

4. A method of making a printed circuit board, said method comprising:

providing a first multilayered portion including at least one dielectric layer having a loss factor and at least one conductive plane wherein said conductive plane includes signal lines capable of having signals pass there-along at a first frequency;

providing a second multilayered portion adapted for having a plurality of electronic components electrically coupled thereto, said second multilayered portion including at least one dielectric layer having a lower loss factor than said loss factor of said dielectric layer of said first multilayered portion and at least one conductive signal plane wherein said conductive signal plane of said second multilayered portion includes signal lines capable of having signals pass there-along at a higher frequency than said first frequency to thereby provide a high speed connection between at least two of said electrical components; and

bonding said first and second multilayered portions together.

5. The method of claim 4 further including providing a conductive through hole within said second multilayered portion prior to said bonding of said first and second multilayered portions.

6. The method of claim 4 wherein said bonding is accomplished by lamination.

7. A method of making a printed circuit board, said method comprising:

providing a first multilayered portion including at least one dielectric layer and at least one conductive plane wherein said conductive plane includes signal lines capable of having signals pass there-along at a first frequency;

providing a second multilayered portion adapted for having a plurality of electronic components electrically coupled thereto, said second multilayered portion including a conducting plane, first and second dielectric layers on opposite sides of said conducting plane, and two conductive signal planes, each conductive signal plane including signal lines capable of having signals pass there-along at a higher frequency than said first frequency to thereby provide a high speed connection between at least two of said electrical components, said two conductive signal planes being positioned, respectively, on said first and second dielectric layers opposite said conducting plane, said second multilayered portion further including a conductive through hole interconnecting at least one of said signal lines of a first of said two conductive signal planes to at least one of said signal lines of the second of said conductive signal plane;

providing a third dielectric layer on said second dielectric layer and said conductive signal plane positioned thereon, said third dielectric layer including at least one opening therein exposing at least one of said signal lines on said conductive signal plane positioned on said second dielectric layer such that at least one of said electrical components can be electrically coupled thereto; and

bonding said first and second multilayered portions.

8. The method of claim 7 further including providing a conductive through hole within said second multilayered portion prior to said bonding of said first and second multilayered portions.

9. The method of claim 7 wherein said bonding is accomplished by lamination.

10. The method of claim 7 further including providing a layer of conductive material on said at least one opening.

11. The method of claim 7 further including providing a conductive plane on said third dielectric layer.

12. The method of claim 11 further including providing a fourth dielectric layer on said third dielectric layer and on said conductive plane located on said third dielectric layer, said fourth dielectric layer including at least one opening therein exposing said at least one opening in said third dielectric layer.

Assignments (11)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2015
From: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.
To: I3 ELECTRONICS, INC.
Reel/Frame 035442/0569 →
RELEASE OF SECURITY INTEREST Recorded Feb 26, 2015
From: MAINES, WILLIAM; MAINES, DAVID
To: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.
Reel/Frame 035098/0968 →
SECURITY AGREEMENT Recorded Jun 12, 2013
From: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.
To: MAINES, WILLIAM; MAINES, DAVID
Reel/Frame 030599/0918 →
SECURITY AGREEMENT Recorded May 6, 2013
From: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.; EI TRANSPORTATION COMPANY LLC; ENDICOTT MEDTECH, INC.; INTEGRIAN HOLDINGS, LLC
To: M&T BANK
Reel/Frame 030359/0057 →
ASSIGNMENT OF SECURITY AGREEMENT Recorded Mar 6, 2013
From: PNC BANK, NATIONAL ASSOCIATION
To: INTEGRIAN HOLDINGS, LLC
Reel/Frame 029938/0823 →
SECURITY AGREEMENT Recorded May 14, 2012
From: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.; EI TRANSPORTATION COMPANY LLC; ENDICOTT MEDTECH, INC.
To: PNC BANK, NATIONAL ASSOCIATION
Reel/Frame 028230/0798 →
RELEASE BY SECURED PARTY Recorded May 14, 2012
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.
Reel/Frame 028230/0611 →
SECURITY AGREEMENT Recorded Dec 3, 2008
From: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 021912/0908 →
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2008
From: WACHOVIA CAPITAL FINANCE CORPORATION
To: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.
Reel/Frame 021861/0869 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 18, 2007
From: WACHOVIA BANK, NATIONAL ASSOCIATION, AS AGENT
To: WACHOVIA CAPITAL FINANCE CORPORATION ( NEW ENGLAND), AS AGENT
Reel/Frame 019304/0676 →
SECURITY AGREEMENT Recorded May 10, 2005
From: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.
To: WACHOVIA BANK, NATIONAL ASSOCIATION, AS AGENT
Reel/Frame 016561/0605 →