Concentric spacer for reducing capacitive coupling in multilayer substrate assemblies
View Patent ↗In one embodiment, a substrate assembly includes a flat substrate having oppositely disposed planar surfaces and a conductor. The conductor is formed on at least one of the planar surfaces and defines a conductor plane. The structure further includes an oversized-in-diameter anti-pad formed through the substrate layer and the conductor layer. The anti-pad further includes a dielectric spacer formed substantially coplanar with the conductor plane.
1. A substrate assembly, the assembly comprising:
a flat substrate having oppositely disposed planar surfaces;
a conductor formed on at least one of the planar surfaces, the conductor layer defining a conductor plane;
an oversized-in-diameter anti-pad formed through the substrate and the conductor, the anti-pad further formed with a spacer disposed substantially coplanar with the conductor plane;
the spacer comprising a dielectric; and
wherein the spacer is isolated from the conductor.
2. A substrate assembly, the assembly comprising:
a flat substrate having oppositely disposed planar surfaces;
a conductor formed on at least one of the planar surfaces, the conductor layer defining a conductor plane;
an oversized-in-diameter anti-pad formed through the substrate and the conductor, the anti-pad further formed with a spacer disposed substantially coplanar with the conductor plane;
a conductive via formed in the anti-pad, the via oriented transverse to the substrate and the conductor;
the spacer comprising a dielectric;
wherein the spacer is coaxially interposed between the via and the conductor and
wherein the spacer is spaced away from the via and the conductor.
3. A substrate assembly, the assembly comprising:
a flat substrate having oppositely disposed planar surfaces;
a conductor formed on at least one of the planar surfaces, the conductor layer defining a conductor plane;
an oversized-in-diameter anti-pad formed through the substrate and the conductor, the anti-pad further formed with a spacer disposed substantially coplanar with the conductor plane;
the spacer comprising a dielectric; and
wherein the spacer comprises a plurality of concentric spaced-apart rings.
4. A multi-layered circuit board assembly for routing a plurality of signal paths, the multi-layered circuit board assembly comprising a plurality of layers, each layer comprising:
a flat substrate having oppositely disposed planar surfaces;
a conductor formed on at least one of the planar surfaces, the conductor layer defining a conductor plane;
an oversized-in-diameter anti-pad formed through the substrate and the conductor, the anti-pad further including a conductor via oriented transverse to the substrate and the conductor;
a spacer formed in the anti-pad, the spacer disposed substantially coplanar with the conductor plane;
the spacer comprising a dielectric; and
wherein the spacer is spaced away from the conductor.
5. A multi-layered circuit board assembly for routing a plurality of signal paths, the multi-layered circuit board assembly comprising a plurality of layers, each layer comprising:
a flat substrate having oppositely disposed planar surfaces;
a conductor formed on at least one of the planar surfaces, the conductor layer defining a conductor plane;
an oversized-in-diameter anti-pad formed through the substrate and the conductor, the anti-pad further including a conductor via oriented transverse to the substrate and the conductor;
a spacer formed in the anti-pad, the spacer disposed substantially coplanar with the conductor plane;
the spacer comprising a dielectric; and
wherein the spacer is spaced away from the via and the conductor.
6. A multi-layered circuit board assembly for routing a plurality of signal paths, the multi-layered circuit board assembly comprising a plurality of layers, each layer comprising:
a flat substrate having oppositely disposed planar surfaces;
a conductor formed on at least one of the planar surfaces, the conductor layer defining a conductor plane;
an oversized-in-diameter anti-pad formed through the substrate and the conductor, the anti-pad further including a conductor via oriented transverse to the substrate and the conductor;
a spacer formed in the anti-pad, the spacer disposed substantially coplanar with the conductor plane; and
the spacer comprising a dielectric; and
wherein the spacer comprises a plurality of concentric spaced-apart rings.
7. A ball-grid-array package for housing at least one semiconductor device, the package have a contact interface adapted for interfacing to a multi-layered circuit board assembly, the contact interface comprising an array of solder ball pads disposed across an interface layer, the package further comprising a substrate assembly coupled to the contact interface, the substrate assembly comprising:
a flat substrate having oppositely disposed planar surfaces;
a conductor formed on at least one of the planar surfaces, the conductor layer defining a conductor plane;
an oversized-in-diameter anti-pad formed through the substrate and the conductor;
a spacer formed in the anti-pad, the spacer disposed substantially coplanar with the conductor;
the spacer comprising a dielectric; and
wherein the spacer is spaced away from the conductor.
8. A ball-grid-array package for housing at least one semiconductor device, the package have a contact interface adapted for interfacing to a multi-layered circuit board assembly, the contact interface comprising an array of solder ball pads disposed across an interface layer, the package further comprising a substrate assembly coupled to the contact interface, the substrate assembly comprising:
a flat substrate having oppositely disposed planar surfaces;
a conductor formed on at least one of the planar surfaces, the conductor layer defining a conductor plane;
an oversized-in-diameter anti-pad formed through the substrate and the conductor;
a spacer formed in the anti-pad, the spacer disposed substantially coplanar with the conductor;
the spacer comprising a dielectric; and
wherein the spacer comprises: a plurality of concentric spaced-apart rings.
9. A method of manufacturing a substrate assembly, the method comprising the steps:
forming a flat substrate core having oppositely disposed planar surfaces;
depositing a conductor on the substrate to form a conductor plane and masking portions of the conductor plane corresponding to electrically isolated spacers coplanar with the conductor plane;
etching the masked portions of the conductor layer to define the spacers;
depositing additional dielectric over the etched conductor layer;
establishing an opening through the substrate transverse to the planar surfaces after depositing the additional dielectric over the etched conductor; and
filling the opening with a dielectric to form an anti-pad having an outer diameter.
10. The method of claim 9 further comprising forming a via after filling the opening.