Patent Assignment
Reel/Frame 035507/0116
Patent Security Agreement
Recorded: 2015-04-27
Pages: 40
Assignee
BARCLAYS BANK PLC
745 SEVENTH AVENUE, 27TH FLOOR, NEW YORK, NEW YORK, 10019
Covered Properties
(588)
Method for Testing Wireless Devices Using Predefined Test Segments Initiated by Over-the-Air Signal Characteristics
PCT:
PCT/US2011/047184 ↗
Determining Propagation Delay
PCT:
PCT/US2012/056228 ↗
Programmable Test Instrument
PCT:
PCT/US2012/056245 ↗
Test Instrument Having a Configurable Interface
PCT:
PCT/US2012/056247 ↗
Programmable Test Instrument
PCT:
PCT/US2012/056250 ↗
System and Method of Maintaining Correction of Dc Offsets in Frequency Down-Converted Data Signals
PCT:
PCT/US2012/063491 ↗
Method for Measuring Sensitivity of Data Packet Signal Receiver
PCT:
PCT/US2013/029257 ↗
Method for Efficient Parallel Testing of Time Division Duplex (Tdd) Communications Systems
PCT:
PCT/US2013/037941 ↗
System and Method for Testing Radio Frequency Device Under Test Capable of Communicating Using Multiple Radio Access Technologies
PCT:
PCT/US2013/043850 ↗
Test System Having Liquid Containment Chambers Over Connectors
PCT:
PCT/US2013/062830 ↗
Interface for a Test System
PCT:
PCT/US2013/062843 ↗
Method of Testing Multiple Data Packet Signal Transceivers Concurrently
PCT:
PCT/US2013/063053 ↗
System and Method for Parallel Testing of Multiple Data Packet Signal Transceivers
PCT:
PCT/US2013/069212 ↗
Debugging in a Semiconductor Device Test Environment
PCT:
PCT/US2013/069215 ↗
Method of Facilitating Testing of Multiple Time-Division-Duplex (Tdd) Data Packet Signal Tranceivers
PCT:
PCT/US2013/069432 ↗
System and Method for Testing Multiple Data Packet Signal Transceivers Concurrently
PCT:
PCT/US2013/071658 ↗
System and Method for Confirming Radio Frequency (Rf) Signal Connection Integrity with Multiple Devices Under Test (Duts) to Be Tested Concurrently
PCT:
PCT/US2013/077944 ↗
System and Method for Confirming Radio Frequency (Rf) Signal Connectivity with Device Under Test (Dut)
PCT:
PCT/US2013/077948 ↗
Embedded Tester
PCT:
PCT/US2014/010418 ↗
Method and Apparatus for Device Testing Using Multiple Processing Paths
PCT:
PCT/US2014/011036 ↗
Matrix Testing Targets
PCT:
PCT/US2014/015814 ↗
Rotatable Camera Module Testing System
PCT:
PCT/US2014/015924 ↗
System and Method for Testing a Data Packet Signal Transceiver
PCT:
PCT/US2014/018252 ↗
System and Method for Testing a Data Packet Signal Transceiver
PCT:
PCT/US2014/018326 ↗
Air Circulation in a System
PCT:
PCT/US2014/019830 ↗
Electronic Assembly Test System
PCT:
PCT/US2014/019832 ↗
Parallel Operation of System Components
PCT:
PCT/US2014/019834 ↗
System and Method for Testing Radio Frequency Wireless Signal Transceivers Using Wireless Test Signals
PCT:
PCT/US2014/019865 ↗
System and Method for Testing Radio Frequency Wireless Signal Transceivers Using Wireless Test Signals
PCT:
PCT/US2014/019912 ↗
Method and Apparatus for Low Latency Communication in an Automatic Testing System
PCT:
PCT/US2014/021695 ↗
Smooth Vi Mode Crossover Method at Compliance Limit Threshold
PCT:
PCT/US2014/021915 ↗
System and Method for Testing a Radio Frequency Multiple-Input Multiple-Output Data Packet Transceiver While Forcing Fewer Data Streams
PCT:
PCT/US2014/028809 ↗
Vector Network Power Meter
PCT:
PCT/US2014/036924 ↗
System and Method for Testing Radio Frequency Wireless Signal Transceivers Using Wireless Test Signals
PCT:
PCT/US2014/038338 ↗
System and Method for Testing Radio Frequency Wireless Signal Transceivers Using Wireless Test Signals
PCT:
PCT/US2014/038351 ↗
System and Method for Testing Radio Frequency Wireless Signal Transceivers Using Wireless Test Signals
PCT:
PCT/US2014/038372 ↗
Calibration Device
PCT:
PCT/US2014/038960 ↗
Method for Measuring Sensitivity of Data Packet Signal Transceiver
PCT:
PCT/US2014/046621 ↗
Method for Testing Data Packet Signal Transceiver Using Coordinated Transmitted Data Packet Signal Power
PCT:
PCT/US2014/046628 ↗
System and Method for Testing Multiple Data Packet Signal Transceivers
PCT:
PCT/US2014/050161 ↗
System and Method for Testing Wide Band Data Packet Signal Transceivers Using Narrow Band Testers
PCT:
PCT/US2014/050276 ↗
Method for Testing Data Packet Signal Transceiver Using Interleaved Device Setup and Testing
PCT:
PCT/US2014/050285 ↗
Method for Testing Data Packet Signal Transceivers with Multiple Radio Access Technologies Using Interleaved Device Setup and Testing
PCT:
PCT/US2014/050297 ↗
Interconnect for Transmitting Signals Between a Device and a Tester
PCT:
PCT/US2014/063646 ↗
System and Method for Data Packet Transceiver Testing After Signal Calibration and Power Settling to Minimize Test Time
PCT:
PCT/US2014/064938 ↗
System and Method for Enabling Testing a Data Link of a Data Packet Signal Transceiver
PCT:
PCT/US2014/064984 ↗
System and Method for Dynamic Signal Interference Detection During Testing of a Data Packet Signal Transceiver
PCT:
PCT/US2014/064995 ↗
Automated Test System with Edge Steering
PCT:
PCT/US2014/066295 ↗
System and Method for Testing Data Packet Transceivers Having Varied Performance Characteristics and Requirements Using Standard Test Equipment
PCT:
PCT/US2014/070480 ↗
System and Method for Concurrently Testing Multiple Packet Data Signal Transceivers Capable of Communicating via Multiple Radio Access Technologies
PCT:
PCT/US2014/070490 ↗
Method for Testing Multiple Wireless Data Packet Signal Transceivers Using Shared Testing Resources
PCT:
PCT/US2015/012264 ↗
System and Method for Enabling Automated Testing of Wireless Data Packet Signal Transceivers
PCT:
PCT/US2015/014620 ↗
Radio Frequency Signal Path with Substantially Constant Phase Shift Over Wide Frequency Band
PCT:
PCT/US2015/019103 ↗
Method for Testing Multiple Data Packet Signal Transceivers with a Shared Tester to Maximize Tester Use and Minimize Test Time
PCT:
PCT/US2015/019111 ↗
Current Regulation for Accurate and Low-Cost Voltage Measurements at the Wafer Level
PCT:
PCT/US2015/021203 ↗
Equi-Resistant Probe Distribution for High-Accuracy Voltage Measurements at the Wafer Level
PCT:
PCT/US2015/021206 ↗
Memory Architecture for Automatic Test Equipment Using Vector Module Table
Patent:
6,286,120 →
Application:
08/299,753 →
With Positioning Modules Incorporating Kinematic Surfaces
Patent:
5,982,182 →
Application:
08/414,456 →
Manipulator for Automatic Test Equipment Test Head
Patent:
5,606,262 →
Application:
08/481,564 →
System for Detecting Faults in Connections Between Integrated Circuits and Circuit Board Traces
Patent:
5,736,862 →
Application:
08/493,399 →
Low Cost Cmos Tester
Patent:
6,469,493 →
Application:
08/510,079 →
Method of Making Memory Chips Using Memory Tester Providing Fast Repair
Patent:
5,795,797 →
Application:
08/516,709 →
Test System for Determining the Orientation of Components on a Circuit Board
Patent:
5,811,980 →
Application:
08/517,573 →
Configurable Probe Card for Automatic Test Equipment
Patent:
5,736,850 →
Application:
08/526,302 →
Integrated Circuit Test Power Supply
Patent:
5,773,990 →
Application:
08/536,206 →
Integrated Prober, Handler and Tester for Semiconductor Components
Patent:
6,024,526 →
Application:
08/546,236 →
Integrated Circuit Test Method and Structure
Patent:
5,917,331 →
Application:
08/546,751 →
System and Method of Programming a Multistation Testing System
Patent:
5,615,219 →
Application:
08/552,141 →
Time Linearity Measurement Using a Frequency Locked, Dual Sequencer Automatic Test System
Patent:
5,604,751 →
Application:
08/555,438 →
Method and Apparatus for Performing Serial and Parallel Scan Testing on an Integrated Circuit
Patent:
5,606,568 →
Application:
08/565,337 →
Automatic Test Equipment with Pipelined Sequencer
Patent:
5,657,486 →
Application:
08/569,020 →
Hybrid Scanner for Use in an Improved Mda Tester
Patent:
5,861,743 →
Application:
08/576,008 →
Apparatus and Method for Performing Digital Signal Processing in an Electronic Circuit Tester
Patent:
5,673,272 →
Application:
08/600,837 →
Apparatus and Method for Providing a Programmable Delay with Low Fixed Delay
Patent:
5,727,021 →
Application:
08/627,858 →
High Speed Serial Data Pin for Automatic Test Equipment
Patent:
5,689,515 →
Application:
08/638,026 →
Integrated Circuit Tray with Flexural Bearings
Patent:
5,758,776 →
Application:
08/653,588 →
Fast Vector Loading for Automatic Test Equipment
Patent:
5,737,512 →
Application:
08/653,949 →
Semiconductor Memory Tester with Hardware Accelerators
Patent:
5,754,556 →
Application:
08/683,397 →
Expanding Gripper with Elastically Variable Pitch Screw
Patent:
5,839,769 →
Application:
08/726,069 →
Memory Tester with Data Compression
Patent:
6,360,340 →
Application:
08/752,414 →
Apparatus and Method for Performing Amplitude Calibration in an Electr Onic Circuit Tester
Patent:
5,929,628 →
Application:
08/760,537 →
Fast Undersampling
Patent:
5,768,155 →
Application:
08/760,887 →
Board Test Apparatus and Method for Fast Capacitance Measurement
Patent:
5,844,412 →
Application:
08/769,556 →
Semiconductor Tester for Testing Devices with Embedded Memory
Patent:
5,923,675 →
Application:
08/803,111 →
Flexible Shielded Laminated Beam for Electrical Contacts and the Like and Method of Contact Operation
Patent:
5,921,786 →
Application:
08/832,303 →
Low Cost, Easy to Use Automatic Test System Software
Patent:
5,910,895 →
Application:
08/874,615 →
Heat-Transfer Enhancing Features for Semiconductor Carriers and Devices
Patent:
6,036,023 →
Application:
08/890,917 →
Low Cost Cmos Tester with High Channel Density
Patent:
6,073,259 →
Application:
08/906,532 →
Tester with Fast Refire Recovery Time
Patent:
5,854,797 →
Application:
08/906,533 →
Semiconductor Chip Tray with Rolling Contact Retention Mechanism
Patent:
5,971,156 →
Application:
08/924,354 →
Low Cost, Highly Parallel Memory Tester
Patent:
5,794,175 →
Application:
08/926,117 →
Test System for Integrated Circuits Using a Single Memory for Both the Parallel and Scan Modes of Testing
Patent:
6,049,901 →
Application:
08/931,164 →
System for Storing and Searching Named Device Parameter Data in a Test System for Testing an Integrated Circuit
Patent:
6,047,293 →
Application:
08/931,784 →
Production Interface for Integrated Circuit Test System
Patent:
5,828,674 →
Application:
08/931,793 →
Method for Capturing Digital Data in an Automatic Test System
Patent:
5,938,780 →
Application:
08/933,391 →
Interface Apparatus for Automatic Test Equipment
Patent:
6,104,202 →
Application:
08/947,680 →
Method for Generating Test Patterns
Patent:
6,052,809 →
Application:
08/951,782 →
Automated Microwave Test System with Improved Accuracy
Patent:
6,249,128 →
Application:
08/955,782 →
System to Simultaneously Test Trays of Integrated Circuit Packages
Patent:
6,097,201 →
Application:
08/962,605 →
Manipulator for Automatic Test Equipment with Active Compliance
Patent:
5,949,002 →
Application:
08/968,316 →
Method of Manufacturing Ball Grid Arrays for Improved Testability
Patent:
5,924,003 →
Application:
08/970,184 →
Small Contactor for Test Probes, Chip Packaging and the Like
Patent:
5,973,394 →
Application:
09/012,838 →
Method and Apparatus Fpr Temperature Control of a Semiconductor Electrical-Test Contractor Assembly
Patent:
6,091,062 →
Application:
09/014,214 →
Flexible Test Environment for Automatic Test Equitment
Patent:
6,128,759 →
Application:
09/045,436 →
High Performance Probe Interface for Automatic Test Eqipment
Patent:
6,037,787 →
Application:
09/047,089 →
Compensating for the Effects of Round-Trip Delay in Automatic Test Equipment
Patent:
6,133,725 →
Application:
09/048,727 →
High Speed, Real-Time, State Interconnect for Automatic Test Equipment
Patent:
6,107,818 →
Application:
09/060,987 →
Relayless Voltage Measurement in Automatic Test Equipment
Patent:
6,194,910 →
Application:
09/104,099 →
Analog Clock Module
Patent:
6,188,253 →
Application:
09/167,883 →
Production Interface for an Integrated Circuit Test System
Patent:
5,938,781 →
Application:
09/170,490 →
Integrated Multi-Channel Analog Test Instrument Architecture Providing Flexible Triggering
Patent:
6,363,507 →
Application:
09/174,866 →
High Density Printed Circuit Board
Patent:
6,215,320 →
Application:
09/178,247 →
Remote Test Module for Automatic Test Equipment
Patent:
6,275,962 →
Application:
09/178,257 →
Low Cost Memory Tester with High Throughput
Patent:
6,204,679 →
Application:
09/186,012 →
Adjustable Tooling Pin
Patent:
6,163,160 →
Application:
09/204,977 →
Pattern Generator for a Packet-Based Memory Tester
Patent:
6,389,525 →
Application:
09/227,690 →
Direct-Measurement Provision of Safe Backdrive Levels
Patent:
6,114,848 →
Application:
09/231,001 →
Circuit-Board Tester with Backdrive-Based Burst Timing
Patent:
6,175,230 →
Application:
09/231,049 →
Automatic Test Equipment Using Sigma Delta Modulation to Create Reference Levels
Patent:
6,282,682 →
Application:
09/245,223 →
Low-Cost Configuration for Monitoring and Controlling Parametric Measurement Units in Automatic Test Equipment
Patent:
6,374,379 →
Application:
09/245,519 →
Serial Switch Driver Architecture for Automatic Test Equipment
Patent:
6,137,310 →
Application:
09/253,175 →
Fail Array Memory Control Circuit with Selective Input Disable
Patent:
6,405,333 →
Application:
09/282,224 →
Failure Capture Apparatus and Method for Automatic Test Equipment
Patent:
6,442,724 →
Application:
09/285,857 →
Driver with Transmission Path Loss Compensation
Patent:
6,360,180 →
Application:
09/309,134 →
Power Sensor Module for Microwave Test Systems
Patent:
6,397,160 →
Application:
09/325,834 →
Noise Source Module for Microwave Test Systems
Patent:
6,268,735 →
Application:
09/326,449 →
Semiconductor Parallel Tester
Patent:
6,476,628 →
Application:
09/340,832 →
Extending Synchronous Busses by Arbitrary Lengths Using Native Bus Protocol
Patent:
6,507,920 →
Application:
09/354,137 →
Integrated Test Cell Cooling System
Patent:
6,208,510 →
Application:
09/360,180 →
Low Cost Timing System for Highly Accurate Multi-Modal Semiconductor Testing
Patent:
6,553,529 →
Application:
09/360,215 →
Pre-Conditioner for Measuring High-Speed Time Intervals Over a Low-Bandwidth Path
Patent:
6,550,036 →
Application:
09/409,618 →
Integrated Test Cell
Patent:
6,310,486 →
Application:
09/410,857 →
Low Jitter Phase-Locked Loop with Duty-Cycle Control
Patent:
6,356,129 →
Application:
09/416,578 →
Easy to Program Automatic Test Equipment
Patent:
6,681,351 →
Application:
09/417,034 →
Circuit and Method for Improved Test and Calibration in Automated Test Equipment
Patent:
6,331,783 →
Application:
09/420,497 →
High-Speed Failure Capture Apparatus and Method for Automatic Test Equipment
Patent:
6,536,005 →
Application:
09/426,486 →
Shunt Capacitance Compensation Structure and Method for a Signal Channel
Patent:
6,463,395 →
Application:
09/457,883 →
Dynamic pin driver combining high voltage mode and high speed mode
Patent:
6,292,010 →
Application:
09/496,690 →
Common-Mode Detection Circuit with Cross-Coupled Compensation
Patent:
6,392,448 →
Application:
09/497,775 →
Differential comparator with dispersion reduction circuitry
Patent:
6,300,804 →
Application:
09/501,471 →
Network Fault Analysis Tool
Patent:
6,823,479 →
Application:
09/503,352 →
Automatic Test Equipment Methods and Apparatus for Interfacing with an External Device
Patent:
6,622,272 →
Application:
09/523,431 →
Detector with common mode comparator for automatic test equipment
Patent:
6,281,699 →
Application:
09/525,557 →
Pc Configuration Fault Analysis
Patent:
7,127,506 →
Application:
09/552,105 →
Low Compliance Tester Interface
Patent:
6,734,688 →
Application:
09/571,563 →
Redundancy Analysis Method and Apparatus for Ate
Patent:
6,499,118 →
Application:
09/574,689 →
Method and Apparatus for Testing Integrated Circuit Chips That Output Clocks for Timing
Patent:
6,486,693 →
Application:
09/577,255 →
Ate Timing Measurement Unit and Method
Patent:
6,609,077 →
Application:
09/584,636 →
Semiconductor Handler for Rapid Testing
Patent:
6,717,115 →
Application:
09/585,453 →
Single Carriage Robotic Monorail Material Transfer System
Patent:
6,446,560 →
Application:
09/605,941 →
Testing Frequency Hopping Devices
Patent:
6,564,350 →
Application:
09/608,040 →
Flexible Test Environment for Automatic Test Equipment
Patent:
6,449,744 →
Application:
09/612,745 →
Automatic Test Manipulator with Support Internal to Test Head
Patent:
6,837,125 →
Application:
09/615,292 →
Automatic test equipment with narrow output pulses
Patent:
6,291,981 →
Application:
09/625,827 →
Capturing and Evaluating High Speed Data Streams
Patent:
6,694,462 →
Application:
09/635,334 →
Test System for Smart Card and Identification Devices and the Like
Patent:
6,466,007 →
Application:
09/638,829 →
Noise-Shaped Digital Frequency Synthesis
Patent:
6,396,313 →
Application:
09/645,367 →
High-Speed Peaking Circuit Fro Characteristic Impedance Control
Patent:
6,642,707 →
Application:
09/661,073 →
Modular Semiconductor Tester Interface Assembly for High Performance Coaxial Connections
Patent:
6,515,499 →
Application:
09/676,041 →
Digital to Analog Converter Employing Sigma-Delta Loop and Feedback Dac Model
Patent:
6,404,369 →
Application:
09/676,064 →
Methods and Apparatus for Generating a Test Signal for Xdsl Devices
Patent:
6,798,830 →
Application:
09/677,028 →
Test Head Actuation System with Positioning and Compliant Modes
Patent:
6,838,868 →
Application:
09/707,764 →
Dut Power Supply Having Improved Switching Dc-Dc Converter
Patent:
6,542,385 →
Application:
09/718,780 →
High Speed and High Accuracy Dut Power Supply with Active Boost Circuitry
Patent:
6,556,034 →
Application:
09/718,808 →
Off-Center Tomosynthesis
Calibrating Single Ended Channels for Differential Performance
Enhanced Loopback Testing of Serial Devices
Low Profile Pneumatically Actuated Docking Module with Power Fault Release
High Current and High Accuracy Linear Amplifier
Curcuit for Improved Test and Calibration in Automated Test Equipment
Apparatus and Method for Managing Automatic Transitions Between Multiple Feedback Paths
Patent:
6,452,436 →
Application:
09/833,985 →
Driver for Integrated Circuit Chip Tester
Dynamic Testing of Electronic Assemblies
Differential Receiver Architecture
Semiconductor Test System Having Double Data Rate Pin Scrambling
Facilitating Comparisons Between Simulated and Actual Behavior of Electronic Devices
Low Leakage Technique for Determining Power Spectra of Non-Coherently Sampled Data
Hybrid Conductor-Board for Multi-Conductor Routing
Method and Apparatus for Calibration and Validation of High Performance Dut Power Supplies
Patent:
6,504,395 →
Application:
09/943,275 →
Mechanism for Clamping Device Interface Board to Peripheral
Low Distortion Frequency Tracking Technique
Control Loop Compensation Circuit and Method
Scan Diagnosis System and Method
Modular Ate Power Supply Architecture
Clock Architecture for a Frequency-Based Tester
High-Speed Digital Multiplexer
Compact Ate with Time Stamp System
High Precision, High-Speed Signal Capture
High Precision, High-Speed Signal Source
Low-Cost Tester Interface Module
Discrete Fourier Transform (Dft) Leakage Removal
Apparatus Having Pattern Scrambler for Testing a Semiconductor Device and Method for Operating Same
Communications Interface for Assembly-Line Monitoring and Control
Methods and Apparatus for Testing Electronic Devices
Printed Circuit Board Assembly for Automatic Test Equipment
Technique for Programming Clocks in Automatic Test System
Algorithm for Configuring Clocking System
Hybrid Tester Architecture
High-Speed Fully Balanced Differential Flip-Flop with Reset
Driver Circuit Employing High-Speed Tri-State for Automatic Test Equipment
Patent:
6,563,352 →
Application:
10/113,179 →
Wafer-Level Contactor
Interface Adapter for Automatic Test Systems
Circuit for Looping Serial Bit Streams from Parallel Memory
System for Testing Dut and Tester for Use Therewith
Semiconductor Test System with Easily Changed Interface Unit
Single Axis Manipulator with Controlled Compliance
Manipulator Apparatus with Low-Cost Compliance
Automatic Test Equipment for Design-for-Test (Dft) and Built-in-Self-Test Circuitry
Ring Calibration Apparatus and Method for Automatic Test Equipment
Rear-Mounted Gimbal for Supporting Test Head
Measuring Skew Between Digitizer Channels Using Fourier Transform
Instrument Initiated Communication for Automatic Test Equipment
Method for Manufacturing Smart Card and Identification Devices and the Like
High Speed Tester with Narrow Output Pulses
Deskewed Differential Detector Employing Analog-to-Digital Converter
Differential Coaxial Contact Array for High-Density, High-Speed Signals
Semiconductor Handler Interface Auto Alignment
Rim Slot Filler Module and Method of Manufacturing the Same
High Power Interface
High Fidelity Electrical Probe
Circuit Board Cover with Exhaust Apertures for Cooling Electronic Components
Flexible Interface for Universal Bus Test Instrument
High Speed Capture and Averaging of Serial Data by Asynchronous Periodic Sampling
Pin Driver for Ac and Dc Semiconductor Device Testing
Coaxial Cable for Overvoltage Protection
Distributed Failure Analysis Memory for Automatic Test Equipment
Universal Approach for Simulating, Emulating, and Testing a Variety of Serial Bus Types
Pre-Compensation for Digital Bit Streams
Method of Providing Direct Impingement Temperature Control of a Device
Patent:
7,004,235 →
Application:
10/345,846 →
Low-Jitter Delay Cell
Hybrid Cooling System for Automatic Test Equipment
Hybrid Ac/Dc-Coupled Channel for Automatic Test Equipment
Measurement Circuit with Improved Accuracy
Semiconductor Test System Having Multitasking Algorithmic Pattern Generator
Automatic Test System with Easily Modified Software
Clock Distribution System for Automatic Test Equipment
Patent:
6,822,498 →
Application:
10/461,568 →
Direct Jitter Analysis of Binary Sampled Data
High-Speed Duty Cycle Control Circuit
Patent:
6,819,155 →
Application:
10/601,688 →
Method for Testing Non-Deterministic Device Data
Apparatus and Method for Testing Non-Deterministic Device Data
Flexible Approach for Representing Different Bus Protocols
Parallel Converter Topology for Reducing Non-Linearity Errors
Current Mirror Compensation Using Channel Length Modulation
Current Mirror Compensation Circuit and Method
Efficient Switching Architecture with Reduced Stub Lengths
High Resolution Synthesizer with Improved Signal Purity
Dds Circuit with Arbitrary Frequency Control Clock
Techniques for Controlling Movement of a Circuit Board Module Along Card Cage Slot
Multi-Stage Numeric Counter Oscillator
Telematics-Based Vehicle Data Acquisition Architecture
Silicon-On-Insulator Channel Architecture for Automatic Test Equipment
Patent:
6,853,181 →
Application:
10/749,266 →
Parallel Source/Capture Architecture
Method and Apparatus for Generating Reference Transmission Signal for Use in Testing Communications Receivers
Patent:
7,457,995 →
Application:
10/769,971 →
Radio Frequency (Rf) Transceiver with Substantially Coincident Communication of Rf and Related Control Signals
Patent:
7,167,682 →
Application:
10/770,030 →
Distributed Test Equipment System for Testing Analog Communications Systems
Patent:
7,457,712 →
Application:
10/770,298 →
Test System with Differential Signal Measurement
Method of Measuring Duty Cycle
Digital Phase Detector
Concentric Spacer for Reducing Capacitive Coupling in Multilayer Substrate Assemblies
Synchronization Between Low Frequency and High Frequency Digital Signals
Comparator Feedback Peak Detector
Precise Time Measurement Apparatus and Method
Heat Exchange Apparatus with Parallel Flow
Automated Test Equipment with Dib Mounted Three Dimensional Tester Electronics Bricks
Apparatus for Planarizing a Probe Card and Method Using Same
Method for Measuring Sensitivity of Data Packet Signal Receiver
Time Measurement Method Using Quadrature Sine Waves
Method and Apparatus for Measuring Jitter
Interface Apparatus for Semiconductor Device Tester
Pin Driver for Ac and Dc Semiconductor Device Testing
Method for Digital Bus Testing
Apparatus and Method for Operating Automated Test Equipment (Ate)
Patent:
7,363,188 →
Application:
11/004,723 →
Rear-Mounted Gimbal for Supporting Test Head
Silicon-On-Insulator Channel Architecture for Automatic Test Equipment
Using Parametric Measurement Units as a Source of Power for a Device Under Test
Method and System for Testing Semiconductor Devices
Method and System for Producing Signals to Test Semiconductor Devices
Pin Electronics with High Voltage Functionality
Over-Voltage Test for Automatic Test Equipment
Method for Testing and Programming Memory Devices and System for Same
Hybrid Ac/Dc-Coupled Channel for Testing
Instrument with Interface for Synchronization in Automatic Test Equipment
Automatic Test System with Synchronized Instruments
Calibrating Automatic Test Equipment Containing Interleaved Analog-to-Digital Converters
Wireless Communication System
Calibrating Automatic Test Equipment to Account for Magnitude and Phase Offsets
Configurable Automatic-Test-Equipment System
Calibrating Automatic Test Equipment
Using a Parametric Measurement Unit for Converter Testing
Patent:
7,023,366 →
Application:
11/137,240 →
Measurement Circuit with Improved Accuracy
Method for Efficient Calibration of Evm Using Compression Characteristics
Method for Measuring Multiple Parameters of a Signal Transmitted by a Signal Generator
Device and Method to Reduce Simultaneous Switching Noise
Jitter Compensation and Generation in Testing Communication Devices
Floating Interface Linkage
Pin Electronics Driver
Ternary Search Process
Delayed Processing of Site-Aware Objects
Efficient Switching Architecture with Reduced Stub Lengths
Portable Manipulator for Stackable Semiconductor Test System
Site-Aware Objects
Site Loops
Strobe Technique for Test of Digital Signal Timing
Strobe Technique for Recovering a Clock in a Digital Signal
Strobe Technique for Time Stamping a Digital Signal
Tester Interface Module
Data Capture in Automatic Test Equipment
Pin Electronics Driver
Low-Spur Low-Distortion Digital-to-Analog Converter
Patent:
7,126,519 →
Application:
11/241,572 →
Apparatus and Method for Testing Non-Deterministic Device Data
Dual Sine-Wave Time Stamp Method and Apparatus
Modularized Device Interface with Grounding Insert Between Two Strips
Automatic Testing Equipment Instrument Card and Probe Cabling System and Apparatus
Method and Apparatus for Adjustment of Synchronous Clock Signals
Compensating for Loss in a Transmission Path
Impedance Controlled via Structure
Jitter Measurement Algorithm Using Locally in-Order Strobes
Determining Frequency Components of Jitter
Method for Testing Embedded Wireless Transceiver with Minimal Interaction Between Wireless Transceiver and Host Processor During Testing
Obtaining Test Data for a Device
Analog-To-Digital Converter with Non-Linearity Compensation
Calibration Circuitry
Method and Apparatus for 0/180 Degree Phase Detector
Enhanced Loopback Testing of Serial Devices
Digitizer with Enhanced Accuracy
Method and System for Monitoring Test Signals for Semiconductor Devices
Alignment Receptacle of a Sensor Adapted to Interact with a Pin to Generate Position Data Along at Least Two Transverse Axes for Docking a Test Head
Multi-Stream Interface for Parallel Test Processing
Phase Locking on Aliased Frequencies
Method for Inspecting a Region of Interest
Method for Capturing Multiple Data Packets in a Data Signal for Analysis
Apparatus for Capturing Multiple Data Packets in a Data Signal for Analysis
High Performance Signal Generation
System for Testing Smart Cards and Method for Same
Connector-To-Pad Printed Circuit Board Translator and Method of Fabrication
Calibrating a Testing Device
Compliant Electro-Mechanical Device
Method for Using Probe Card
Sine Wave Generator with Dual Port Look-Up Table
Apparatus and Method for Simultaneous Testing of Multiple Orthogonal Frequency Division Multiplexed Transmitters with Single Vector Signal Analyzer
Apparatus and Method for Simultaneous Testing of Multiple Orthogonal Frequency Division Multiplexed Transmitters with Single Vector Signal Analyzer
Liquid Immersion Cooled Multichip Module
Patent:
7,285,851 →
Application:
11/540,391 →
Signal Analysis Using Dual Converters and Cross Spectrum
Low Cost, High Purity Sign Wave Generator
Networked Test System
Comparator Feedback Peak Detector
Test Solution Development Method
Quantized Data-Dependent Jitter Injection Using Discrete Samples
Conductive Shielding Device
Error Reduction for Parallel, Time-Interleaved Analog-to-Digital Converter
V/I Source and Test System Incorporating the Same
Rotational Positioner and Methods for Semiconductor Wafer Test Systems
Distributing Data Among Test Boards to Determine Test Parameters
High-Speed Digital Multiplexer
Design-For-Test Micro Probe
Electrically Stimulated Fingerprint Sensor Test Method
Calibrating a Tester Using Esd Protection Circuitry
System and Method for Testing Multiple Packet Data Transmitters
Direct Facility Water Test Head Cooling Architecture
Tester Input/Output Sharing
Adaptive Background Propagation Method and Device Therefor
Cost Effective Low Noise Single Loop Synthesizer
Calibrating Jitter
System and Method for Testing Wireless Devices
Calibration Device
Integrated High-Efficiency Microwave Sourcing Control Process
Apparatus, System and Method for Calibrating and Verifying a Wireless Communication Device
System for Testing an Embedded Wireless Transceiver
System for Testing an Embedded Wireless Transceiver
Apparatus and Method for Testing a Wireless Transceiver
Emulating Behavior of a Legacy Test System
Laser Targeting Mechanism
Automated Test Equipment Interface
Method and Apparatus for Cooling Non-Native Instrument in Automatic Test Equipment
Apparatus and Method for Operating Automated Test Equipment (Ate)
Patent:
9,160,554 →
Application:
11/931,566 →
Testing of Analog to Digital Converters
Calibrating Automatic Test Equipment
Manipulator Constant Force Spring Counterbalance
Disk Drive Testing
Disk Drive Transport, Clamping and Testing
Residual Fourier-Padding Interpolation for Instrumentation and Measurement
Shielded Cable Interface Module and Method of Fabrication
Interpolation Digital-to-Analog Converter
Identifying Periodic Jitter in a Signal
Efficient, Selective Error Reduction for Parallel, Time-Interleaved Analog-to-Digital Converter
Instrument with Interface for Synchronization in Automatic Test Equipment
Adjustable Test Pattern Results Latency
Jitter Frequency Determining System
Determining Frequency Components of Jitter
Time Measurement of Periodic Signals
Test System with High Frequency Interposer
Automated Test Equipment with Dib Mounted Three Dimensional Tester Electronics Bricks
Transferring Disk Drives Within Disk Drive Testing Systems
Disk Drive Emulator and Method of Use Thereof
Bulk Feeding Disk Drives to Disk Drive Testing Systems
Enclosed Operating Area for Disk Drive Testing Systems
Temperature Control Within Disk Drive Testing Systems
Dependent Temperature Control Within Disk Drive Testing Systems
Vibration Isolation Within Disk Drive Testing Systems
Thermal Control System for Test Slot of Test Rack for Disk Drive Testing System with Thermoelectric Device and a Cooling Conduit
Fast, Low Power Formatter for Automatic Test System
Current Meter with Reduced Range Switching and Load Transients
Patent:
7,538,539 →
Application:
12/117,034 →
Apparatus and Method for Testing a Communication Circuit
Tracker Circuit and Method for Automated Test Equipment Systems
Method for Testing Data Packet Transceiver Using Loop Back Packet Generation
X-Ray Inspection of Solder Reflow in High-Density Printed Circuit Board Applications
Method of and System for Obtaining Linear Data for Object Scanned Using Non-Collimated, Poly-Energetic X-Rays
Method of and System for Calibration of Inspection Systems Producing X-Ray Images
System and Method for Mounting Shielded Cables to Printed Circuit Board Assemblies
Disk Drive Emulator and Method of Use Thereof
Method for Measuring Multiple Parameters of a Signal Transmitted by a Signal Generator
Method and Apparatus for Computing Interpolation Factors in Sample Rate Conversion Systems
Coaxial Cable to Printed Circuit Board Interface Module
Radio Frequency (Rf) Signal Generator and Method for Providing Test Signals for Testing Multiple Rf Signal Receivers
Timing Signal Generator Providing Synchronized Timing Signals at Non-Integer Clock Multiples Adjustable by More Than One Period
Apparatus and Method for Controlling Memory Overrun
Digital Communications Test System for Multiple Input, Multiple Output (Mimo) Systems
Pin Electronics Liquid Cooled Multi-Module for High Performance, Low Cost Automated Test Equipment
General Purpose Protocol Engine
Method and Apparatus for Testing Multiple Data Signal Transceivers Substantially Simultaneously with Common Transceiver Tester
Transferring Storage Devices Within Storage Device Testing Systems
Method and System for Testing Data Signal Amplifier Having Output Signal Power Dependent Upon Multiple Power Control Parameters
Patent:
7,772,922 →
Application:
12/425,058 →
Processing Storage Devices
Test Slot Cooling System for a Storage Device Testing System
Heating Storage Devices in a Testing System
Storage Device Temperature Sensing
Methods and Apparatus for Connecting Printed Circuit Boards Using Zero-Insertion Wiping Force Connectors
Method and System for Testing Multiple Data Packet Transceivers Together During a Predetermined Time Interval
Device Interface Board with Cavity Back for Very High Frequency Applications
Using Pattern Generators to Control Flow of Data to and from a Semiconductor Device Under Test
Capacitive Opens Testing in Low Signal Environments
Low Capacitance Probe for Testing Circuit Assembly
System and Method for Testing Multiple Digital Signal Transceivers in Parallel
Storage Device Testing System Cooling
Test Slot Carriers
Test Access Component for Automatic Testing of Circuit Assemblies
Automated Test Equipment Employing Test Signal Transmission Channel with Embedded Series Isolation Resistors
Bulk Feeding Disk Drives to Disk Drive Testing Systems
Transferring Disk Drives Within Disk Drive Testing Systems
Dependent Temperature Control Within Disk Drive Testing Systems
Processing Storage Devices
Test Slot Cooling System for a Storage Device Testing System
Patent:
7,778,031 →
Application:
12/727,700 →
Method for Testing in a Reconfigurable Tester
Protocol Aware Digital Channel Apparatus
Individually Heating Storage Devices in a Testing System
Storage Device Temperature Sensing
Disk Drive Transport, Clamping and Testing
Disk Drive Transport, Clamping and Testing
Vibration Isolation Within Disk Drive Testing Systems
Connecting Digital Storage Oscilloscopes
Multi-Level Triggering Circuit
Driving an Electronic Instrument
Attenuator Circuit
Storage Device Testing System Cooling
Patent:
7,929,303 →
Application:
12/775,560 →
System and Method for Using Multiple Network Addresses to Establish Synchronization of a Device Under Test and Test Equipment Controlling the Test
Management Of Air-Borne Vibration
Application:
12/815,085 →
Publication:
US 2011/0305132
Storage Device Testing System Cooling
Damping Vibrations Within Storage Device Testing Systems
System and Method of Providing Driver Software to Test Controller to Facilitate Testing by Wireless Transceiver Tester of a Device Under Test
A Storage Device Testing System with a Conductive Heating Assembly
Storage Device Temperature Sensing
Bulk Transfer of Storage Devices Using Manual Loading
Temperature Control Within Disk Drive Testing Systems
Engaging Test Slots
Method for Testing Wireless Devices Using Predefined Test Segments Initiated by Over-the-Air Signal Characteristics
High Throughput Semiconductor Device Testing
Electro-Optical Communications Link
Laser Targeting Mechanism
Enclosed Operating Area for Storage Device Testing Systems
Temperature Control Within Storage Device Testing Systems
Achieving Greater Test Efficiencies Using ACK Signal Suppression
Digital Communications Test System for Multiple Input, Multiple Output (Mimo) Systems
Transferring Storage Devices Within Storage Device Testing Systems
Identifying Fuel Cell Defects
Test Slot Cooling System for a Storage Device Testing System
Compensating for Harmonic Distortion in an Instrument Channel
Bulk Transfer of Storage Devices Using Manual Loading
Application:
13/053,651 →
Publication:
US 2011/0236163
Probe-Card Interposer Constructed Using Hexagonal Modules
System and Method for Simultaneous Mimo Signal Testing with Single Vector Signal Analyzer
System for Concurrent Test of Semiconductor Devices
Liquid Cooling During Testing
Method and Apparatus for Testing Electrical Connections on a Printed Circuit Board
Fast Open Circuit Detection for Open Power and Ground Pins
Test Equipment Calibration
System and Method for Using a Single Vector Signal Generator to Verify Device Under Test
Patent:
8,312,329 →
Application:
13/158,870 →
Ate to Detect Signal Characteristics of a Dut
System and Method for Deterministic Testing of Packet Error Rate in Electronic Devices
Test System Supporting Simplified Configuration for Controlling Test Block Concurrency
Test Instrument Having a Configurable Interface
Programmable Test Instrument
Programmable Test Instrument
Determining Propagation Delay
Fast Single-Ended to Differential Converter
System and Method of Maintaining Correction of Dc Offsets in Frequency Down-Converted Data Signals
Digital Communications Test System for Multiple Input, Multiple Output (Mimo) Systems
Digital Communications Test System for Multiple Input, Multiple Output (Mimo) Systems
High Reliability, High Voltage Switch
Method for Identifying Self-Generated Spurious Signals
Method for Enabling a Device Under Test (Dut) to Retry a Portion of a Pre-Defined Test Sequence
Edge Triggered Calibration
Method for Measuring Sensitivity of Data Packet Signal Receiver
System and Method for Synchronized Triggering of Test Equipment for Testing Mimo Transceivers
Method for Efficient Parallel Testing of Time Division Duplex (Tdd) Communications Systems
System and Method for Initiating Testing of Multiple Communication Devices
General Purpose Protocol Engine
System and Method for Testing a Radio Frequency (Rf) Multiple-Input-Multiple-Output (Mimo) Device Under Test (Dut)
Method for Transferring and Confirming Transfer of Predefined Data to a Device Under Test (Dut) During a Test Sequence
System and Method for Execution of User-Defined Instrument Command Sequences Using Multiple Hardware and Analysis Modules
Managing Interrupts
Implementing Remote Procedure Calls
System and Method for Facilitating Comparison of Radio Frequency (Rf) Data Signals Transmitted by a Device Under Test (Dut) and Received by a Test System
Bulk Transfer of Storage Devices Using Manual Loading
System and Method for Testing Radio Frequency Device Under Test Capable of Communicating Using Multiple Radio Access Technologies
Storage Device Testing Systems
Application:
13/623,282 →
Publication:
US 2013/0071224
Controlling the Temperature of an Object
Debugging in a Semiconductor Device Test Environment
System and Method for Parallel Testing of Multiple Data Packet Signal Transceivers
Method of Facilitating Testing of Multiple Time-Division-Duplex (Tdd) Data Packet Signal Transceivers
Method of Testing Multiple Data Packet Signal Transceivers Concurrently
Interface for a Test System
Test System Having Liquid Containment Chambers Over Connectors
Embedded Tester
System and Method for Testing Multiple Data Packet Signal Transceivers Concurrently
Rotatable Camera Module Testing System
Matrix Testing Targets
Managing Energy Transmission
Application:
13/786,937 →
Publication:
US 2013/0256967
System and Method for Confirming Radio Frequency (Rf) Signal Connection Integrity with Multiple Devices Under Test (Duts) to Be Tested Concurrently
System and Method for Confirming Radio Frequency (Rf) Signal Connectivity with Device Under Test (Dut)
Smooth Vi Mode Crossover Method at Compliance Limit Threshold
Method and Apparatus for Device Testing Using Multiple Processing Paths
Parallel Operation of System Components
Application:
13/834,803 →
Publication:
US 2014/0271064
Air Circulation in a System
Application:
13/834,880 →
Publication:
US 2014/0262149
Method and Apparatus for Low Latency Communication in an Automatic Testing System
System and Method for Testing Radio Frequency Wireless Signal Transceivers Using Wireless Test Signals
System and Method for Testing Radio Frequency Wireless Signal Transceivers Using Wireless Test Signals
System and Method for Testing a Data Packet Signal Transceiver
System and Method for Testing a Data Packet Signal Transceiver
Patent:
8,780,966 →
Application:
13/841,019 →
Electronic Assembly Test System
System and Method for Testing a Radio Frequency Multiple-Input Multiple-Output Data Packet Transceiver While Forcing Fewer Data Streams
System and Method for Testing Radio Frequency Wireless Signal Transceivers Using Wireless Test Signals
Patent:
8,811,461 →
Application:
13/912,410 →
System and Method for Testing Radio Frequency Wireless Signal Transceivers Using Wireless Test Signals
System and Method for Testing Radio Frequency Wireless Signal Transceivers Using Wireless Test Signals
Calibration Device
System and Method for Execution of User-Defined Instrument Command Sequences Using Multiple Hardware and Analysis Modules
Method for Testing Sensitivity of a Data Packet Signal Transceiver
Method for Testing Data Packet Signal Transceiver Using Coordinated Transmitted Data Packet Signal Power
Synchronizing Data from Different Clock Domains by Bridges One of the Clock Signals to Appear to Run an Integer of Cycles More Than the Other Clock Signal
System and Method for Testing Multiple Data Packet Signal Transceivers
Patent:
8,879,659 →
Application:
14/017,012 →
Method for Testing Data Packet Signal Transceivers Using Interleaved Device Setup and Testing
Method for Testing Data Packet Signal Transceivers with Multiple Radio Access Technologies Using Interleaved Device Setup and Testing
System and Method for Testing Wide Band Data Packet Signal Transceivers Using Narrow Band Testers
Automated Test System with Event Detection Capability
System and Method for Data Packet Transceiver Testing After Signal Calibration and Power Settling to Minimize Test Time
Automated Test System with Edge Steering
Interconnect for Transmitting Signals Between a Device and a Tester
System and Method for Enabling Testing a Data Link of a Data Packet Signal Transceiver
System and Method for Dynamic Signal Interference Detection During Testing of a Data Packet Signal Transceiver
System and Method for Concurrently Testing Multiple Packet Data Signal Transceivers Capable of Communicating via Multiple Radio Access Technologies
System and Method for Testing Data Packet Transceivers Having Varied Performance Characteristics and Requirements Using Standard Test Equipment
Method for Testing Multiple Wireless Data Packet Signal Transceivers Using Shared Testing Resources
System and Method for Testing a Radio Frequency Transceiver by Controlling Test Flow via an Induced Interrupt
Equi-Resistant Probe Distribution for High-Accuracy Voltage Measurements at the Wafer Level
Current Regulation for Accurate and Low-Cost Voltage Measurements at the Wafer Level
Rf Phase Shift Apparatus Having an Electrically Coupled Path Separated from an Electromagnetically Coupled Path to Provide a Substantially Constant Phase Difference Therebetween
Circuitry to Protect a Test Instrument
Method for Testing Multiple Data Packet Signal Transceivers with a Shared Tester to Maximize Tester Use and Minimize Test Time
Vector Network Power Meter
Method and System for Testing a Radio Frequency Data Packet Signal Transceiver at a Low Network Media Layer
Application:
14/300,358 →
Publication:
US 2015/0358839
Structure for Transmitting Signals in an Application Space Between a Device Under Test and Test Electronics
Edge Generator-Based Phase Locked Loop Reference Clock Generator for Automated Test System
Controlling Signal Path Inductance in Automatic Test Equipment
Coaxial Structure for Transmission of Signals in Test Equipment
Isolation, Extraction and Evaluation of Transient Distortions from a Composite Signal
Method for Testing Implicit Beamforming Performance of a Multiple-Input Multiple-Output Radio Frequency Data Packet Signal Transceiver
Application:
14/461,573 →
Probe Alignment Connection Device
Capacitive Opens Testing of Low Profile Components
One-Shot Circuit
Multi-Stage Equalization
System and Method for Capturing and Enabling Analysis of Test Data Packets from a Radio Frequency Data Packet Signal Transceiver
Thermal Control
Assembling Devices for Probe Card Testing
Application:
14/536,928 →
Publication:
US 2016/0131702
SYSTEM AND METHOD FOR CONFIRMING RADIO FREQUENCY (RF) SIGNAL CONNECTION INTEGRITY WITH MULTIPLE DEVICES UNDER TEST (DUTs) TO BE TESTED CONCURRENTLY
Controlling a Per-Pin Measurement Unit
Braking System
System and Method for Testing a Radio Frequency (Rf) Multiple-Input-Multiple-Output (Mimo) Device Under Test (Dut)
High Speed Data Transfer Using Calibrated, Single-Clock Source Synchronous Serializer-Deserializer Protocol
Virtual Distance Test Techniques for Radar Applications
Gripper For Automation
Application:
62/056,092 →
Related Assignments
(3)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Jan 6, 2014
From: HUTNER, MARC REUBEN; ROWE, JOHN F.
To: TERADYNE, INC.
Reel/Frame 031895/0107 →
Assignment of Assignor's Interest
May 7, 2014
From: FAEHNRICH, RICHARD JOHN
To: TERADYNE, INC.
Reel/Frame 032839/0477 →
Release of Security Interest in Intellectual Property
Jun 28, 2019
From: BARCLAYS BANK PLC, AS COLLATERAL AGENT
To: TERADYNE, INC.; EAGLE TEST SYSTEMS, INC.; LITEPOINT CORPORATION; NEXTEST SYSTEMS CORPORATION
Reel/Frame 049632/0940 →