High throughput semiconductor device testing

1. A method of manufacturing an electronic device, the method comprising:

testing the electronic device, the testing comprising processing a signal by:

receiving a plurality of samples of a periodic signal representing the output of the electronic device;

with at least one processor, computing from at least a portion of the plurality of samples a first settling profile of the periodic signal;

subtracting the first settling profile from the plurality of samples to obtain a first plurality of adjusted samples; and

performing an analysis function on the first plurality of adjusted samples; and

conditionally performing at least one manufacturing operation for the electronic device based on the results of testing the electronic device.

2. The method of claim 1 , wherein computing comprises fitting a polynomial to the plurality of samples.

3. The method of claim 1 , wherein computing comprises fitting an exponential curve or a spline to the plurality of samples.

4. The method of claim 1 , further comprising:

computing from the first plurality of adjusted samples a second settling profile of the first plurality of adjusted samples; and

subtracting the second settling profile from the first plurality of adjusted samples to obtain a second plurality of adjusted samples.

5. The method of claim 4 , wherein computing comprises fitting a first curve to the plurality of samples and a second curve to the first plurality of adjusted samples.

6. The method of claim 5 , wherein the first curve and the second curve are different.

7. The method of claim 1 , wherein computing comprises fitting a curve to the plurality of samples.

8. The method of claim 7 , wherein the method further comprises iteratively:

fitting a curve to the plurality of samples and adjusting the plurality of samples by, in each iteration after the first:

computing a model of the settling in the output of the electronic device reflected in the adjusted samples provided in a preceding iteration; and

providing adjusted samples by subtracting values in the model of the settling computed in the iteration from the adjusted samples provided in the preceding iteration.

9. The method of claim 8 , wherein fitting the curve to the plurality of samples comprises fitting a polynomial to the plurality of samples in the first iteration and, for each iteration after the first iteration, fitting a polynomial to the adjusted samples provided in the preceding iteration.

10. The method of claim 8 , wherein iteratively fitting the curve comprises performing between 6 and 12 iterations, inclusive.

11. The method of claim 10 , wherein in at least a portion of the iterations the curve is a polynomial having an order between 4 and 8, inclusive.

12. The method of claim 11 , wherein the fitting the polynomial comprises fitting a Newton Form polynomial.

13. A test system comprising:

a digitizer configured to receive an output of a device under test;

a pre-processor configured to:

receive a plurality samples from the digitizer;

derive a settling profile in the output of the device under test based on the plurality of samples; and

subtracting the settling profile from the plurality of samples to produce a plurality of adjusted samples; and

a processor configured to receive the plurality of adjusted samples and perform a test function based on the plurality of adjusted samples.

14. The test system of claim 13 , wherein the pre-processor comprises an ASIC.

15. The test system of claim 13 , wherein the pre-processor comprises a digital signal processor.

16. The test system of claim 15 , wherein the pre-processor is configured by computer-executable instructions to derive the settling profile and adjust the plurality of samples.

17. The test system of claim 16 , wherein the computer-executable instructions comprise a portion of a digital signal processing library.

18. A non-transitory, computer-readable storage medium comprising computer-executable instructions that, when executed, test an electronic device according to a method comprising:

processing a plurality of samples of a periodic signal representing an output of the electronic device by:

fitting a polynomial to at least a portion of the plurality of samples;

subtracting values based on the polynomial from the plurality of samples to provide adjusted samples, the values based on the polynomial representing settling in the output of the electronic device; and

conditionally performing at least one operation on the electronic device based on the results of processing the plurality of samples.

19. The non-transitory, computer-readable storage medium of claim 18 , wherein the method comprises iteratively producing adjusted samples by, in each iteration after a first iteration:

fitting a polynomial to at least a portion of the adjusted samples provided in a preceding iteration; and

providing adjusted samples by subtracting from the adjusted samples provided in the preceding iteration the values based on the polynomial fit to the adjusted samples in the iteration.

20. The non-transitory, computer-readable storage medium of claim 19 , wherein the computer-executable instructions comprise a function of a custom digital signal processing library that accepts as an input the plurality of samples and provides as an output the adjusted samples provided at a final iteration.

21. The non-transitory, computer-readable storage medium of claim 20 , wherein iteratively producing adjusted samples comprises performing a predetermined number of iterations, the predetermined number being between 6 and 12, inclusive.

22. The non-transitory, computer-readable storage medium of claim 19 , wherein the polynomial in different iterations have different orders.

23. The non-transitory, computer-readable storage medium of claim 22 , wherein the polynomial is a Newton-form polynomial.