Connecting digital storage oscilloscopes

1. An apparatus comprising:

a first oscilloscope having multiple channels; and

a second oscilloscope having multiple channels, the first and second oscilloscopes comprising digital storage oscilloscopes;

wherein the first oscilloscope is configured to operate as a master or as a slave, the first oscilloscope operating as the master by using a first trigger signal and a first clock signal that are native to the first oscilloscope, and the first oscilloscope operating as the slave by using a second trigger signal and a second clock signal that are native to the second oscilloscope; and

wherein the second oscilloscope is configured to operate as the master or as the slave, the second oscilloscope operating as the master by using the second trigger signal and the second clock signal, and the second oscilloscope operating as the slave by using the first trigger signal and the first clock signal.

2. The apparatus of claim 1 , wherein when the first oscilloscope is configured to operate as the master, the second oscilloscope is configured to operate as the slave, and when the second oscilloscope is configured to operate as the master, the first oscilloscope is configured to operate as the slave.

3. The apparatus of claim 2 , wherein each of the first and second oscilloscopes comprises:

circuitry to select either the first clock signal or the second clock signal; and

circuitry to select either first trigger signal or the second trigger signal.

4. The apparatus of claim 2 , wherein each of the first and second oscilloscopes comprises:

an analog to digital converter (ADC) to receive either the first clock signal or the second clock signal, the ADC to convert an input analog signal into a digital signal; and

circuitry to generate a trigger signal, the trigger signal being either the first trigger signal or the second trigger signal, the circuitry comprising:

a comparator to identify when the input analog signal exceeds a voltage;

an edge selector to identify a rising or falling edge of a signal output by the comparator and to produce an asynchronous trigger signal; and

a latch to output the trigger signal based on the asynchronous trigger signal and a version of a clock signal, the clock signal being either the first clock signal or the second clock signal.

5. The apparatus of claim 4 , wherein the circuitry of each of the first and second oscilloscopes comprises a step-down circuit to generate the version of the clock signal, the step down circuit being configured to generate the version of the clock signal by sampling the clock signal.

6. The apparatus of claim 4 , wherein the trigger signal is a synchronous trigger signal because the trigger signal output by the latch is synchronized to the version of the clock signal; and wherein each of the first and second oscilloscopes further comprises:

a time interval digitizer to determine a time difference that is based on the asynchronous trigger signal and the synchronous trigger signal, the time difference being a difference between an actual time that a trigger event occurred and a time that a clock signal running the ADC occurred.

7. The apparatus of claim 6 , wherein each of the first and second oscilloscopes further comprises:

memory; and

a controller to capture data from the ADC based on the time difference, and to store the data in the memory.

8. The apparatus of claim 1 , wherein the first oscilloscope comprises a digital storage oscilloscope and the second oscilloscope comprises a digital storage oscilloscope; and

wherein either of the first and second oscilloscopes may take on the role of master or slave.