IP Library Granted Patent US 7,019,547
Granted Patent B2
US 7,019,547 · App. 10/988,765 · Granted Mar 28, 2006

Pin driver for AC and DC semiconductor device testing

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Quick Facts
Patent No.
US 7,019,547
App. No.
10/988,765
Granted
Mar 28, 2006
Kind
B2
Abstract

A pin electronics circuit for use in automatic test equipment is disclosed. The pin electronics circuit includes a pin driver having an output adapted for coupling to a device-under-test pin, and a first input. AC input circuitry couples to a pattern generator to receive pattern test signals while DC input circuitry connects to a DC parametric controller. Selector circuitry selectively couples the AC and DC input circuitry to the pin driver first input.

Claims (18)

1. A pin electronics circuit for use in automatic test equipment, the pin electronics circuit including:

a pin driver having an output adapted for coupling to a device-under-test pin, and a first input; and

selector circuitry configured to selectively couple AC input circuitry and DC input circuitry to the first input.

2. The pin electronics of claim 1 , further comprising a current measurement amplifier disposed at the output of the pin driver.

3. The pin electronics of claim 1 wherein the pin driver comprises a second input fed back to the pin driver output.

4. The pin electronics of claim 1 wherein the selector circuitry comprises:

a multiplexer having an output coupled to the first input, a control input, and a pair of signal level inputs, and

logic circuitry having a first input coupled to the AC input circuitry and a second input coupled to the DC input circuitry.

5. The pin electronics of claim 4 wherein the logic circuitry comprises an OR gate.

6. The pin electronics of claim 1 wherein the AC input circuitry comprises a pattern generator.

7. The pin electronics of claim 1 wherein the DC input circuitry comprises a register.

8. The pin electronic circuit of claim 1 wherein the AC input circuitry is adapted for coupling to a pattern generator to receive pattern test signals.

9. The pin electronic circuit of claim 1 wherein the DC input circuitry is adapted for coupling to a DC parametric controller.

10. A pin electronics circuit for use in automatic test equipment, the pin electronics circuit comprising:

means for driving test waveforms to a device-under-test pin, the means for driving having an output for coupling to the pin, and an input; and

means configured to selectively couple AC input circuitry and DC input circuitry to the input of the means for driving.

11. The pin electronics circuit of claim 10 wherein the DC input circuitry is adapted for coupling to a DC parametric controller.

12. The pin electronics circuit of claim 10 wherein the AC input circuitry is adapted for coupling to a pattern generator to receive pattern test signals.

Assignments (6)
SECURITY INTEREST Recorded May 7, 2020
From: TERADYNE, INC.
To: TRUIST BANK
Reel/Frame 052595/0632 →
RELEASE OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Jun 28, 2019
From: BARCLAYS BANK PLC, AS COLLATERAL AGENT
To: TERADYNE, INC.; EAGLE TEST SYSTEMS, INC.; LITEPOINT CORPORATION; NEXTEST SYSTEMS CORPORATION; GENRAD, LLC; ENERGID TECHNOLOGIES CORPORATION
Reel/Frame 049632/0940 →
PATENT SECURITY AGREEMENT Recorded Apr 27, 2015
From: TERADYNE, INC.; LITEPOINT CORPORATION
To: BARCLAYS BANK PLC
Reel/Frame 035507/0116 →
RELEASE OF SECURITY INTEREST Recorded May 13, 2009
From: BANK OF AMERICA, N.A.
To: TERADYNE, INC
Reel/Frame 022668/0750 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 9, 2009
From: AGHAEEPOUR, FARROKH
To: TERADYNE, INC
Reel/Frame 022078/0323 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Dec 3, 2008
From: TERADYNE, INC.
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 021912/0762 →