Calibrating automatic test equipment containing interleaved analog-to-digital converters

1. Automatic test equipment (ATE) comprising:

interleaved analog-to-digital (A2D) converters to produce digital signals, the digital signals being used to produce an output signal, the output signal comprising a single signal that is a combination of the digital signals, the output signal having spurs;

a look-up table (LUT) to store correction values, the correction values for reducing the spurs in the output signal;

circuitry to apply the correction values to the output signal; and

a processing device configured to calibrate the LUT prior to the circuitry applying the correction values to the output signal, the processing device calibrating the LUT by comparing test signals passed through the A2D converters to an original signal upon which the test signals were based.

2. The ATE of claim 1 , wherein the spurs comprise at least one of image spurs and offset spurs, and the correction values substantially negate at least some of the spurs.

3. The ATE of claim 1 , further comprising a buffer that receives the digital signals and that provides the output signal to the circuitry.

4. The ATE of claim 3 , wherein the interleaved A2D converters comprise at least a first A2D converter and a second A2D converter, the first A2D converter producing a first digital signal and outputting the first digital signal to the buffer, and the second A2D converter producing a second digital signal and outputting the second digital signal to the buffer.

5. The ATE of claim 4 , wherein the first A2D converter and the second A2D converter sample an input analog signal at different times to produce the first digital signal and the second digital signal, respectively.

6. The ATE of claim 1 , further comprising programmable logic, wherein the LUT and the circuitry are part of the programmable logic.

7. The ATE of claim 1 , wherein the circuitry comprises an element to combine the correction values and the output signal.

8. The ATE of claim 1 , wherein the circuitry applies the correction values to the output signal to produce a corrected output signal; and

wherein the processing device comprises a digital signal processor configured to receive the corrected output signal.

9. A system for calibrating automatic test equipment (ATE), the system comprising:

a processing device to provide a first digital signal;

a waveform generator to generate a first analog signal, the first analog signal being based on the first digital signal;

interleaved analog-to-digital (A2D) converters to receive a second analog signal, the second analog signal being based on the first analog signal, the interleaved A2D converters to produce second digital signals, the second digital signals being used to produce an output signal that is digital; and

programmable logic to store a look-up table (LUT);

wherein the processing device is configured to receive a third digital signal that corresponds to the output signal, to generate correction values based on the third digital signal, and to store the correction values in the LUT.

10. The system of claim 9 , wherein the processing device generates the correction values by comparing the third digital signal to the first digital signal, the correction values corresponding to a difference between the third digital signal and the first digital signal.

11. The system of claim 9 , wherein the waveform generator comprises at least one digital-to-analog (D2A) converter and a bandpass filter that are used in producing the analog signal from the first digital signal.

12. The system of claim 9 , wherein the output signal contains spurs, and the correction values are used to reduce spurs in future output signals that are based on outputs of interleaved A2D converters.

13. The system of claim 9 , wherein the interleaved A2D converters comprise at least a first A2D converter and a second A2D converter, the first A2D converter producing one digital signal by sampling the second analog signal at one time, and the second A2D converter producing an other digital signal by sampling the second analog signal at another time, the one digital signal and the other digital signal comprising the second digital signals.

14. The system of claim 13 , wherein the second analog signal comprises one of plural multi-tones, the multi-tones being across a frequency range of the interleaved A2D converters.

15. The system of claim 14 , wherein the multi-tones are phase-aligned or phase-misaligned.

16. A method of calibrating automatic test equipment (ATE), the method comprising:

providing a first digital signal;

generating a first analog signal based on the first digital signal;

receiving, at interleaved analog-to-digital (A2D) converters, a second analog signal, the second analog signal being based on the first analog signal;

outputting, from the interleaved A2D converters, second digital signals, the second digital signals being used to produce an output signal that is digital; and

generating correction values based on a third digital signal, the third digital signal corresponding to the output signal;

wherein the correction values are usable to adjust a future output signal that is based on outputs of interleaved A2D converters.

17. The method of claim 16 , wherein generating the correction values comprises:

comparing the third digital signal to the first digital signal, the correction values corresponding to a difference between the third digital signal and the first digital signal.

18. The method of claim 16 , wherein the second analog signal comprises one of plural multi-tones, the multi-tones being across a frequency range of the interleaved A2D converters that receive the second analog signal.

19. The method of claim 18 , wherein the multi-tones are phase-aligned or phase-misaligned.

20. The method of claim 16 , further comprising:

using the correction values to adjust the future output signal by combining the correction values with the future output signal to reduce spurs in the future output signal.

21. Automatic test equipment (ATE) comprising:

interleaved analog-to-digital (A2D) converters to produce digital signals, the digital signals being used to produce an output signal, the output signal having spurs;

a buffer to receive the digital signals and to provide the output signal;

a look-up table (LUT) to store correction values, the correction values for reducing the spurs in the output signal;

circuitry to apply the correction values to the output and

a processing device configured to calibrate the LUT prior to the circuitry applying the correction values to the output signal, the processing device calibrating the LUT by comparing test signals passed through the A2D converters to an original signal upon which the test signals were based.

22. The ATE of claim 21 , wherein the spurs comprise at least one of image spurs and offset spurs, and the correction values substantially negate at least some of the spurs.

23. The ATE of claim 22 , wherein the interleaved A2D converters comprise at least a first A2D converter and a second A2D converter, the first A2D converter producing a first digital signal and outputting the first digital signal to the buffer, and the second A2D converter producing a second digital signal and outputting the second digital signal to the buffer.

24. The ATE of claim 23 , wherein the first A2D converter and the second A2D converter sample an input analog signal at different times to produce the first digital signal and the second digital signal, respectively.

25. The ATE of claim 21 , further comprising programmable logic, wherein the LUT and the circuitry are part of the programmable logic.

26. The ATE of claim 21 , wherein the circuitry comprises an element to combine the correction values and the output signal.

27. The ATE of claim 21 , wherein the circuitry applies the correction values to the output signal to produce a corrected output signal; and

wherein the processing device comprises a digital signal processor configured to receive the corrected output signal.