IP Library Granted Patent US 7,254,508
Granted Patent B2
US 7,254,508 · App. 11/231,722 · Granted Aug 7, 2007

Site loops

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Quick Facts
Patent No.
US 7,254,508
App. No.
11/231,722
Granted
Aug 7, 2007
Kind
B2
Abstract

A method for use with a test system having sites that hold devices under test (DUTs) includes executing a first site loop to iterate through the sites, where the first site loop includes an instruction to program hardware associated with at least one of the sites, and executing a second site loop to process data received from the DUTs, where the second site loop and the first site loop have a same syntax.

Claims (150)

1. A method for use with a test system having sites that hold devices under test (DUTs), the method comprising:

executing a first site loop to iterate through the sites, wherein the first site loop comprises an instruction to program hardware associated with at least one of the sites; and

executing a second site loop to process data received from the DUTs, via the sites

wherein the data received from the DUTs comprises test data, and the second site loop processes the test data as part of determining whether the DUTs pass or fail testing;

wherein the second site loop and the first site loop are executed using at least some common code; and

wherein, during execution of the first site loop and the second site loop, hardware response to site selection is stayed pending encounter of a hardware programming instruction.

2. The method of claim 1 , wherein executing the first site loop comprises:

informing a driver associated with the hardware that a site is pending;

encountering a hardware statement to program the hardware;

receiving an indication from the driver in response to the hardware statement;

posting the hardware statement in response to the indication; and

processing the hardware statement to program the hardware at the site.

3. The method of claim 2 , wherein executing the first site loop further comprises:

proceeding to a next site after processing the hardware statement;

posting the next site; and

processing the hardware statement to program the hardware at the next site.

4. The method of claim 3 , wherein, after the hardware statement has been processed for all of the sites, the method further comprises:

restoring the sites to states that existed prior to executing the first site loop.

5. The method of claim 4 , wherein an enumerator stores states of the sites, the enumerator storing states of the sites that existed prior to executing the first loop; and

wherein the states of the sites that existed prior to executing the first site loop are obtained from the enumerator, and thereafter the method comprises destroying the enumerator.

6. The method of claim 2 , wherein executing the second site loop comprises:

informing hardware drivers that the sites are pending; and

processing data received from the DUTs sequentially.

7. The method of claim 6 , wherein the second site loop is executable using instructions that are capable of encountering a hardware statement to program the hardware, but the instructions are not executed because the second site loop does not encounter the hardware statement.

8. A method for use with a test system having sites that hold devices under test (DUTs), the method comprising:

executing a first site loop iterate through the sites, wherein the first site loop comprises an instruction to program hardware associated with at least one of the sites; and

executing a second site loop to process data received from the DUTs, wherein the second site loop and the first site loop are executed using at least some common code;

wherein the data received from the DUTs comprises test data, and the second site loop processes the test data as part of determining whether the DUTs pass or fail testing; and

wherein executing the first site loop comprises:

informing a driver associated with the hardware that a site is pending;

encountering a hardware statement to program the hardware;

receiving an indication from the driver in response to the hardware statement;

posting the hardware statement in response to the indication; and

processing the hardware statement to program the hardware at the site.

9. The method of claim 8 , wherein executing the first site loop further comprises:

proceeding to a next site after processing the hardware statement;

posting the next site; and

processing the hardware statement to program the hardware at the next site.

10. The method of claim 9 , wherein, after the hardware statement has been processed for all of the sites, the method further comprises:

restoring the sites to states that existed prior to executing the first site loop.

11. The method of claim 10 , wherein an enumerator stores states of the sites, the enumerator storing states of the sites that existed prior to executing the first loop; and

wherein the states of the sites that existed prior to executing the first site loop are obtained from the enumerator, and thereafter the method comprises destroying the enumerator.

12. A method for use with a test system having sites that hold devices under test (DUTs), the method comprising:

executing a first site loop to iterate through the sites, wherein the first site loop comprises an instruction to program hardware associated with at least one of the sites; and

executing a second site loop to process data received from the DUTs, wherein the second site loop and the first site loop are executed are executed using at least some common code;

wherein the data received from the DUTs comprises test data, and the second site loop processes the test data as part of determining whether the DUTs pass or fail testing; and

wherein executing the second site loop comprises:

informing hardware drivers that the sites are pending; and

processing data received from the DUTs sequentially.

13. The method of claim 12 , wherein the second site loop is executable using instructions that are capable of encountering a hardware statement to program the hardware, receiving an indication from a driver in response to the hardware statement, and posting the hardware statement in response to the indication, but the instructions are not executed because the second site loop does not encounter the hardware statement.

14. A testing system comprising:

a testing apparatus comprising:

sites to hold devices under test (DUTs);

hardware to interact with the DUTs in at least some of the sites; and

memory to store a driver for controlling the hardware; and

a computing device comprising:

memory to store computer code; and

a processing device to execute the computer code to;

execute a first site loop to program the hardware via the driver;

receive data from the DUTs via the sites following programming; and

execute a second site loop to process the data;

wherein the first site loop and the second site loop have at least some executable code in common; and

wherein, during execution of the first site loop and the second site loop, hardware response to site selection is stayed pending encounter of a hardware programming instruction.

15. A testing system comprising:

a testing apparatus comprising:

sites to hold devices under test (DUTs);

hardware to interact with the DUTs in at least some of the sites; and

memory to store a driver for controlling the hardware; and

a computing device comprising:

memory to store computer code; and

a processing device to execute the computer code to:

execute a first site loop to program the hardware via the driver;

receive data from the DUTs following programming; and

execute a second site loop to process the data;

wherein the first site loop and the second site loop have at least some executable code in common; and

wherein executing the first site loop comprises:

informing the driver that a site is pending;

encountering a hardware statement to program the hardware;

receiving an indication from the driver in response to the hardware statement;

posting the hardware statement in response to the indication; and

processing the hardware statement to program hardware associated with the site.

16. The testing system of claim 15 , wherein executing the first site loop further comprises:

proceeding to a next site after processing the hardware statement;

posting the next site; and

processing the hardware statement to program hardware associated with a next site.

17. The testing system of claim 16 , wherein, after the hardware statement has been processed for all of the sites, the processing device executes computer code to:

restore the sites to states of the sites that existed prior to executing the first site loop.

18. A machine-readable medium to store executable instructions for use with a test system having sites that hold devices under test (DUTs), the instructions to cause one or more machines to:

execute a first site loop to iterate through the site, wherein the first site loop comprises an instruction to program hardware associated with at least one of the sites; and

execute a second site loop to process data from the DUTs via the sites;

wherein the data received from the DUTs comprises test data, and the second site loop processes the test data as part of determining whether the DUTs pass or fail testing;

wherein the second site loop and the first site loop are executed using at least some common code; and

wherein, during execution of the first site loop and the second site loop, hardware response to site selection is stayed pending encounter of a hardware programming instruction.

19. The machine-readable medium of claim 18 , wherein executing the first site loop comprises:

informing a driver associated with the hardware that a site is pending;

encountering a hardware statement to program the hardware;

receiving an indication from the driver in response to the hardware statement;

posting the hardware statement in response to the indication; and

processing the hardware statement to program the hardware at the site.

20. The machine-readable medium of claim 19 , wherein executing the first site loop further comprises:

proceeding to a next site after processing the hardware statement;

posting the next site; and

processing the hardware statement to program the hardware at the next site.

21. The machine-readable medium of claim 20 , wherein the machine readable medium further comprises instructions to restore the sites to states that existed prior to executing the first site loop after the hardware statement has been processed for all of the sites.

22. The machine-readable medium of claim 21 , wherein an enumerator stores states of the sites, the enumerator storing states of the sites that existed prior to executing the first loop; and

wherein the states of the sites that existed prior to executing the first site loop are obtained from the enumerator, and thereafter the enumerator is destroyed.

23. the machine-readable medium of claim 18 , wherein executing the second site loop comprises:

informing hardware drivers that the sites are pending; and

processing data received from the DUTs sequentially.

24. A machine-readable medium to store executable instructions for use with a test system having sites that hold devices under test (DUTs), the instructions to cause one or more machines to:

execute a first site loop to iterate through the sites, wherein the first loop comprises an instruction to program hardware associated with at least one of the sites; and

execute a second site loop to process data received from the DUTs;

wherein the second site loop and the first site loop are executed using at least some common code;

wherein the data received from the DUTs comprises test data, and the second site loop processes the test data as part of determining whether the DUTs pass or fail testing; and

wherein executing the first site loop comprises:

informing a driver associated with the hardware that a site is pending;

encountering a hardware statement to program the hardware;

receiving an indication from the driver in response to the hardware statement;

posting the hardware statement in response to the indication; and

processing the hardware statement to program hardware associated with the site.

25. the machine-readable medium of claim 24 , wherein executing the first site loop further comprises:

proceeding to a next site after processing the hardware statement;

posting the next site; and

processing the hardware statement to program the hardware associated with a next site.

26. The machine-readable medium of claim 25 , wherein the machine-readable medium further comprises instructions to cause the one or more machines to:

restore the sites to states that existed prior to executing the first site loop after the hardware statement has been processed for all the sites.

27. The machine-readable medium of claim 26 , wherein an enumerator stores states of the sites, the enumerator storing states of the sites that existed prior to executing the first loop; and

wherein the states of the sites that existed prior to executing the first site loop are obtained from the enumerator.

28. A machine-readable medium to store executable instructions for use with a test system having sites that hold devices under test (DUTs), the instructions to cause one or more machines to:

execute a first site loop to iterate through the sites, wherein the first site loop comprises an instruction to program hardware associated with at least one of the sites; and

execute a second site loop process data received from the DUTs;

wherein the second site loop and the first site loop are executed using at least some common code;

wherein the data received from the DUTs comprises test data, and the second site loop processes the test data as part of determining whether the DUTs pass or fail testing; and

wherein executing the second site loop comprises:

informing hardware drivers that the sites are pending; and

processing data received from the DUTs sequentially.

29. The machine-readable medium of claim 28 , wherein the second site loop is executable using code that is capable of encountering a hardware statement to program the hardware, but the code is not executed because the second site loop does not encounter the hardware statement.

30. The machine-readable medium of claim 23 , wherein the second site loop is executable using instructions that are capable of encountering a hardware statement to program the hardware, but the instructions are not executed because the second site loop does not encounter the hardware statement.

31. the testing system of claim 14 , wherein executing the first site loop comprises:

informing the driver that a site is pending;

encountering a hardware statement to program the hardware;

receiving an indication from the driver in response to the hardware statement;

posting the hardware statement in response to the indication; and

processing the hardware statement to program hardware associated with the site.

32. The testing system of claim 31 , wherein executing the first site loop further comprises:

proceeding to a next site after processing the hardware statement;

posting the next site; and

processing the hardware statement to program hardware associated with a next site.

33. The testing system of claim 32 , wherein, after the hardware statement has been processed for all of the sites, the processing device executes computer code to:

restore the sites to states of the sites that existed prior to executing the first site loop.

Assignments (6)
SECURITY INTEREST Recorded May 7, 2020
From: TERADYNE, INC.
To: TRUIST BANK
Reel/Frame 052595/0632 →
RELEASE OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Jun 28, 2019
From: BARCLAYS BANK PLC, AS COLLATERAL AGENT
To: TERADYNE, INC.; EAGLE TEST SYSTEMS, INC.; LITEPOINT CORPORATION; NEXTEST SYSTEMS CORPORATION; GENRAD, LLC; ENERGID TECHNOLOGIES CORPORATION
Reel/Frame 049632/0940 →
PATENT SECURITY AGREEMENT Recorded Apr 27, 2015
From: TERADYNE, INC.; LITEPOINT CORPORATION
To: BARCLAYS BANK PLC
Reel/Frame 035507/0116 →
RELEASE OF SECURITY INTEREST Recorded May 13, 2009
From: BANK OF AMERICA, N.A.
To: TERADYNE, INC
Reel/Frame 022668/0750 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Dec 3, 2008
From: TERADYNE, INC.
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 021912/0762 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 20, 2005
From: HLOTYAK, STEPHEN J.
To: TERADYNE, INC.
Reel/Frame 017021/0035 →