Method of manufacturing a wire bond-less electronic component for use with an external circuit
View Patent ↗A wire bond-less electronic component is for use with a circuit external to the wire bond-less electronic component. The wire bond-less electronic component includes a support substrate ( 110, 410 ), an electronic device ( 130 ) over the support substrate, and a cover ( 140, 440, 540 ) located over the electronic device and the support substrate. The cover includes an interconnect structure ( 141, 441, 541 ) electrically coupled to the electronic device and adapted to electrically couple together the electronic device and the circuit for providing impedance transformation of an electrical signal between the electronic device and the circuit.
1. A method of manufacturing a wire bond-less electronic component for use with a circuit external to the wire bond-less electronic component, the method comprising:
mounting a semiconductor substrate over a support substrate, the semiconductor substrate supporting an electronic device; and
affixing a cover over the electronic device and the support substrate, the cover comprising:
an interconnect structure electrically coupling together the electronic device and the circuit for providing impedance transformation of an electrical signal between the electronic device and the circuit.
2. The method of claim 1 further comprising:
manufacturing the electronic device in the semiconductor substrate.
3. The method of claim 1 wherein:
affixing the cover further comprises:
simultaneously affixing the cover to the support substrate and electrically coupling together the electronic device and the interconnect structure.
4. The method of claim 1 wherein:
affixing the cover further comprises:
keeping the wire bond-less electronic component devoid of wire bonds; and
electrically coupling together the electronic device and the interconnect structure.
5. The method of claim 1 wherein:
affixing the cover further comprises:
self-aligning the cover to the support substrate.
6. The method of claim 1 wherein:
affixing the cover further comprises:
self-aligning the cover to the semiconductor substrate.
7. A method of manufacturing a wire bond-less electronic component for use with a circuit external to the wire bond-less electronic component, the method comprising:
mounting an electronic device over a support substrate; and
affixing a cover located over the electronic device and the support substrate, wherein the cover includes an interconnect structure electrically coupled to the electronic device and adapted to electrically couple together the electronic device and the circuit, the interconnect structure further for providing impedance transformation of an electrical signal between the electronic device and the circuit.
8. The method of claim 7 , further comprising:
locating the interconnect structure within the cover.
9. The method of claim 7 further comprising:
locating the interconnect structure on a surface of the cover.
10. The method of claim 7 further comprising:
providing electrical leads located adjacent to the cover, wherein the interconnect structure electrically couples together the electronic device and the electrical leads, and wherein the electrical leads are adapted to electrically couple together the interconnect structure and the circuit.
11. The method of claim 7 wherein:
the wire bond-less electronic component includes a surface mount device.
12. The method of claim 7 further comprising:
self-aligning the cover to the support substrate.
13. The method of claim 7 further comprising:
supporting a device substrate with the support substrate; and
self-aligning the cover to the device substrate, wherein mounting the electronic device includes mounting the electronic device to the device substrate.
14. The method of claim 7 wherein:
the impedance transformation includes a zero inductance ground potential for the electronic device.
15. The method of claim 14 further comprising:
providing an electrical terminal at least partially located over the cover; and
electrically coupling the electrical terminal to a portion of the interconnect structure providing the zero inductance ground potential.
16. The method of claim 15 further comprising:
locating the portion of the interconnect structure providing the zero inductance ground potential adjacent to an outer perimeter of the cover.
17. The method of claim 7 wherein:
the interconnect structure includes a matching network.
18. The method of claim 7 wherein:
the interconnect structure includes a first portion comprising a direct current bias circuit and a second portion comprising an impedance transformation circuit.
19. The wire bond-less electronic component of claim 7 wherein:
the interconnect structure includes a combining manifold.
20. The wire bond-less electronic component of claim 7 wherein:
the interconnect structure provides harmonic termination of the electrical signal between the electronic device and the circuit.
21. The method of claim 7 further comprising:
providing an additional electronic device over the support substrate, under the cover, and adjacent to the electronic device; and
electrically coupling the additional electronic device to the interconnect structure.
22. The method of claim 7 wherein:
the interconnect structure includes a multi-layer interconnect structure.
23. The method of claim 7 wherein:
the interconnect structure includes an electrically floating portion located within the cover.
24. A method of manufacturing a wire bond-less electronic component for use with a circuit external to the wire bond-less electronic component, the method comprising:
supporting a semiconductor substrate with a flange;
supporting a semiconductor device with the semiconductor substrate; and
locating a lid over the semiconductor device, the semiconductor substrate, and the flange, wherein the lid includes a multi-functional interconnect system electrically coupled to the semiconductor device and adapted for electrically coupling together the semiconductor device and the circuit, the interconnect system further for providing a direct current to the semiconductor device and for providing impedance transformation of electrical signals between the semiconductor device and the circuit.
25. The method of claim 24 wherein:
the multi-functional interconnect system is embedded within the lid.
26. The method of claim 24 wherein:
the multi-functional interconnect system is located adjacent to a bottom surface of the lid.
27. The method of claim 24 wherein:
the lid self-aligns to the flange.
28. The method of claim 24 wherein:
the lid self-aligns to the semiconductor substrate.
29. The method of claim 24 wherein:
the multi-functional interconnect system includes a direct current bias circuit for providing the direct current to the semiconductor device, an impedance transformation circuit for providing the impedance transformation of the electrical signals between the semiconductor device and the circuit, and a power combining manifold.
30. The method of claim 29 wherein:
the direct current bias circuit is separate from the impedance transformation circuit.
31. The method of claim 29 wherein:
the impedance transformation circuit further provides harmonic termination of the electrical signals between the semiconductor device and the circuit.