Granted Patent B2

US 7,235,471 · App. 10/854,389 · Granted Jun 26, 2007

Abstract

Claims (45)

1. A method for forming a semiconductor device, the method comprising;

providing a semiconductor substrate;

forming an insulating layer over the semiconductor substrate;

forming a conductive layer over the insulating layer;

forming a first metal silicide layer over the conductive layer by performing an anneal and implanting nitrogen into the first metal silicide layer, wherein the first metal silicide has a first thickness;

patterning the conductive layer to form a patterned first layer, wherein the patterned first layer is at least a part of a control electrode;

patterning the first metal silicide layer to form a patterned first metal silicide layer over the control electrode so that the patterned first metal silicide layer remains over the control electrode; and

forming a second metal silicide over the patterned metal silicide layer, wherein the second metal silicide layer comprises the first metal silicide layer, the second metal silicide layer has a second thickness, and the second thickness of the second metal silicide layer is greater than the first thickness of first metal silicide layer.

2. The method of claim 1 , wherein the first thickness is less than approximately 25 nanometers and the second thickness is less than approximately 40 nanometers.

3. The method of claim 1 , wherein forming a first metal silicide layer comprises forming a first metal silicide layer selected from the group consisting of nickel silicide, cobalt silicide and titanium silicide.

4. The method of claim 3 , wherein the second metal silicide consists of the same material.

5. The method of claim 3 , wherein the second metal silicide consists of different materials.

6. The method of claim 1 , wherein forming the second metal silicide layer further comprises depositing a third metal silicide layer over the first metal silicide layer using a process selected from the group consisting of chemical vapor deposition (CVD) and atomic layer deposition (ALD).

7. The method of claim 1 , wherein forming the second metal silicide layer further comprises:

sputtering a metal layer on the first layer;

performing a first anneal at a first temperature; and

performing a second anneal at a second temperature, wherein the second temperature is greater than the first temperature.

8. A method for forming a semiconductor device, the method comprising:

providing a semiconductor substrate;

forming an insulating layer over the semiconductor substrate;

forming a polysilicon layer over the insulating layer;

forming a first metal silicide layer over the polysilicon layer by performing an anneal and implanting nitrogen into the first metal silicide layer, wherein the first metal silicide layer comprises silicon and one of cobalt and nickel;

patterning the first metal silicide layer and the polysilicon layer;

forming a second metal silicide over the patterned metal silicide layer, wherein the second metal silicide and the first metal silicide form a combined metal silicide region.

9. The method of claim 8 , wherein the second metal silicide is a different material than the first metal silicide.

10. The method of claim 8 , wherein the second metal silicide is a same material as the first metal silicide.

11. The method of claim 8 , wherein forming the first metal silicide layer over the first layer further comprises depositing the first metal silicide layer using a process selected from the group consisting of chemical vapor deposition (CVD) and atomic layer deposition (ALD).

12. The method of claim 8 , wherein forming the first metal silicide layer over the first layer further comprises:

sputtering a metal layer on the first layer;

performing a first anneal at a first temperature; and

performing a second anneal at a second temperature, wherein the second temperature is greater than the first temperature.

13. The method of claim 12 , wherein forming the second metal silicide layer further comprises implanting nitrogen into the second metal silicide layer.

14. The method of claim 8 , wherein the first metal silicide layer has a first thickness and the combined metal silicide region has a second thickness, wherein the first thickness is less than the second thickness.

15. The method of claim 14 , wherein the first thickness is less than approximately 25 nanometers and the second thickness is less than approximately 40 nanometers.

16. A method of forming a semiconductor device, the method comprising:

providing a semiconductor substrate;

forming a gate electrode stack over the semiconductor substrate, wherein the gate electrode stack comprises a top layer comprising silicon;

forming a first metal silicide layer over the top layer by performing an anneal and implanting nitrogen into the first metal silicide layer, wherein the first metal silicide layer comprises one of nickel and cobalt;

patterning the gate electrode stack to form a gate electrode, wherein patterning the gate electrode stack comprises patterning the metal layer to form at least a part of the gate electrode;

patterning the first metal silicide layer over the gate electrode stack to form a patterned first metal silicide layer;

doping the semiconductor substrate laterally adjacent the gate electrode to form active regions; and

forming a second metal silicide layer over on the first metal silicide layer and the active regions.

17. The method of claim 16 , wherein the gate electrode stack consists of the top layer.

18. The method of claim 17 , wherein the gate electrode stack further comprises a bottom layer, wherein the bottom layer comprises a metal.

19. The method of claim 1 , wherein forming the first metal silicide layer over the conductive layer further comprises depositing the first metal silicide layer using a process selected from the group consisting of chemical vapor deposition (CVD) and atomic layer deposition (ALD).

Assignments (23)