IP Library Granted Patent US 7,368,326
Granted Patent B2
US 7,368,326 · App. 10/855,148 · Granted May 6, 2008

Methods and apparatus to reduce growth formations on plated conductive leads

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Quick Facts
Patent No.
US 7,368,326
App. No.
10/855,148
Granted
May 6, 2008
Kind
B2
Abstract

A process includes annealing one or more plated conductive leads at a predetermined temperature. The one or more plated conductive leads are plated with one or more layers, where each layer comprises a material. The predetermined temperature is greater than or equal to approximately a melting point of one of the materials. The annealing can reduce growth formations, such as whiskers, on the one or more conductive leads. Lead frames and other devices having plated conductive leads may be subjected to the process, and the resultant plated conductive leads will have fewer growth formations than plated conductive leads not subjected to the process. The plated conductive leads may be trimmed and formed prior to or after the anneal.

Claims (46)

1. A method for reducing growth formations on one or more plated conductive leads, the method comprising the step of annealing the one or more plated conductive leads at a predetermined temperature, the one or more plated conductive leads plated with one or more layers, each layer comprising a material, the predetermined temperature greater than or equal to approximately a melting point of one of the materials, wherein said annealing step reduces growth formations in comparison to a solder reflow process.

2. The method of claim 1 , further comprising one or more steps of plating one or more conductive leads comprising a core with each of the one or more materials to create the plated one or more conductive leads.

3. The method of claim 2 , further comprising the steps of trimming and forming the plated conductive leads, wherein the steps of trimming and forming occur before or after the one or more steps of plating and before or after the step of annealing.

4. The method of claim 1 , wherein the step of annealing comprises the step of reflowing the one or more plated conductive leads at at least at the predetermined temperature to attach the one or more plated conductive leads to a circuit board.

5. The method of claim 1 , further comprising the step of reflowing the one or more plated conductive leads to attach the one or more plated conductive leads to a circuit board.

6. Ihe method of claim 1 , wherein:

the one or more conductive leads comprise a core comprising copper;

the one or more layers comprise a finish comprising tin; and

the predetermined temperature is greater than or equal to approximately a melting point of the finish.

7. The method of claim 6 , wherein:

the one or more conductive leads comprise a core consisting essentially of copper; and

the one or more layers comprise a finish consisting essentially of tin.

8. The method of claim 6 , wherein the finish is between 3 to 25 micrometers in thickness.

9. The method of claim 7 , wherein the finish is between 10 to 25 micrometers in thickness.

10. The method of claim 6 , wherein the predetermined temperature is greater than or equal to approximately a melting point of tin.

11. The method of claim 10 , wherein the predetermined temperature is less than or equal to approximately 260 degrees centigrade.

12. The method of claim 6 , further comprising the step of plating the core with a material comprising tin to create the finish.

13. The method of claim 1 , wherein:

the one or more layers comprise an underplate and a finish, the underplate comprises nickel, and the finish comprises tin; and

the one or more plated conductive leads comprise a core comprising copper; and

the predetermined temperature is greater than or equal to approximately a melting point of the finish.

14. The method of claim 13 , wherein:

the one or more conductive leads comprise a core consisting essentially of copper; and

the one or more layers comprise an underplate consisting essentially of nickel and a finish consisting essentially of tin.

15. The method of claim 13 , wherein the underplate has a thickness between 0.3 and three micrometers.

16. The method of claim 13 , further comprising the steps of:

plating the core with a material comprising nickel to create the underplate; and

plating the underplate with a material comprising tin to create the finish.

17. The method of claim 13 , wherein the step of annealing is performed for a predetermined time, wherein the predetermined time is at least one second and is less than a time determined to ensure that all of the nickel is not consumed during the anneal step.

18. The method of claim 1 , wherein step of annealing is performed for at least one second.

19. The method of claim 1 , wherein:

the one or more conductive leads comprise a core comprising copper;

the one or more layers comprise an underplate comprising silver and a finish comprising tin; and

the predetermined temperature is greater than or equal to approximately a melting point of the finish.

20. The method of claim 1 , wherein:

the one or more layers comprise a finish comprising one or more of indium, cadmium, zinc, antimony, lead, iron, nickel, gold, silver, and palladium; and

the predetermined temperature is greater than or equal to approximately a melting point of the finish.

21. The method of claim 1 , wherein the one or more conductive leads comprise a core comprising one or more of copper, copper alloy and alloy 342 .

22. An apparatus comprising one or more plated conductive leads and made by a process comprising the step of annealing at least the one or more plated conductive leads at a predetermined temperature, the one or more plated conductive leads plated with one or more layers, each layer comprising a material, the predetermined temperature greater than or equal to approximately a melting point of one of the materials, wherein said annealing step reduces growth formations in comparison to a solder reflow process.

23. The apparatus of claim 22 , wherein:

the one or more plated conductive leads are a plurality of plated conductive leads;

the apparatus comprises a package; and

the plurality of plated conductive leads are part of the package.

24. The apparatus of claim 23 , wherein the apparatus further comprises a circuit board coupled to the plurality of plated conductive leads.

25. The apparatus of claim 22 , wherein the apparatus comprises an integrated circuit coupled to the one or more plated conductive leads.

26. An integrated circuit comprising one or more plated conductive leads plated with one or more layers, wherein the one or more conductive leads have been annealed at a predetermined temperature greater than or equal to a melting point of one of the one or more layers, wherein said annealing step reduces growth formations in comparison to a solder reflow process.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Apr 15, 2022
From: CORTLAND CAPITAL MARKET SERVICES LLC
To: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
Reel/Frame 059723/0382 →
SECURITY INTEREST Recorded Feb 1, 2018
From: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
To: CORTLAND CAPITAL MARKET SERVICES LLC, AS COLLATERAL AGENT
Reel/Frame 045216/0020 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2017
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.; BROADCOM CORPORATION
To: BELL SEMICONDUCTOR, LLC
Reel/Frame 044886/0766 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: AGERE SYSTEMS LLC
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035365/0634 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →