Three-dimensionally mounted semiconductor module and three-dimensionally mounted semiconductor system
View Patent ↗Semiconductor chips are stacked on a first main surface of an interconnect substrate. The semiconductor chips have a base and connection bumps. Mutually facing two of the bases and the interconnect substrate are apart from each other. The connection bumps electrically connect the mutually facing two of the bases and the interconnect substrate together. Insulating sealing members seal the connection bumps and fill spaces between the mutually facing two of the base and the interconnect substrate. The sealing members have a cavity penetrating the sealing member.
1. A semiconductor module comprising:
an interconnect substrate having a first main surface;
a plurality of semiconductor chips stacked on the first main surface, the semiconductor chips having a base and connection bumps, mutually facing two of the bases and the interconnect substrate being apart from each other, the connection bumps electrically connecting the mutually facing two of the bases and the interconnect substrate together; and
a plurality of insulating sealing members which seal the connection bumps, the seating members filling spaces between the mutually facing two of the bases and the interconnect substrate, the sealing members having cavities penetrating the sealing members, ends of the cavities being connected to conduits, a cooling fluid being supplied to the cavities through one of the conduits and being discharged from the cavities through another one of the conduits.
2. The module according to claim 1 , wherein in a plane along the first main surface, the cavities extend from a first side of sides defining a shape of one of the semiconductor chip to a second one of the sides.
3. The module according to claim 1 , wherein the connection bumps are placed at position which is to be side walls of the cavities according to a required shape of the cavities in a plane along the first main surface.
4. The module according to claim 1 , wherein a first semiconductor chip of the semiconductor chips is in a rectangular shape in a first plane which is along the first main surface,
the connection bumps are formed along a pair of opposite sides of the first semiconductor chip in the first plane; and
the cavities extend between a remaining pair of sides of the first semiconductor chip in the first plane.
5. The module according to claim 1 , further comprising substrate connecting terminals provided on a second main surface opposite to the first main surface to electrically connect the interconnect substrate to a mounting substrate which faces the second main surface.
6. A semiconductor module comprising:
an interconnect substrate having a first main surface;
a plurality of semiconductor chips stacked on the first main surface, the semiconductor chips having a base and connection bumps, mutually facing two of the bases and the interconnect substrate being apart from each other, the connection bumps electrically connecting the mutually facing two of the bases and the interconnect substrate together;
a plurality of insulating sealing members which seal the connection bumps, the sealing members filling spaces between the mutually facing two of the bases and the interconnect substrate, the sealing members having cavities penetrating the sealing members; and
substrate connecting terminals provided on the first main surface to electrically connect the interconnect substrate to a mounting substrate which faces the first main surface.
7. The module according to claim 1 , wherein water or an organic solvent is allowed to flow through the cavities.
8. The module according to claim 1 , wherein air or an inert gas is allowed to flow through the cavities.
9. A semiconductor module comprising:
an interconnect substrate having a first main surface;
a plurality of semiconductor chips stacked on the first main surface, the semiconductor chips having a base and connection bumps, mutually facing two of the bases and the interconnect substrate being apart from each other, the connection bumps electrically connecting the mutually facing two of the bases and the interconnect substrate together;
a plurality of insulating sealing members which seal the connection bumps, the sealing members filling spaces between the mutually facing two of the bases and the interconnect substrate, the sealing members having cavities penetrating the sealing members; and
a plurality of first dummy bumps which are provided in the cavities on a first semiconductor chip of the semiconductor chips and which are electrically independent of an interior of the first semiconductor chip.
10. The module according to claim 9 , further comprising a plurality of second dummy bumps provided on a second semiconductor chip of the semiconductor chips which faces the first semiconductor chip, the second dummy bumps being arranged in a plane along the first main surface where the first dummy bumps are not arranged, the second dummy bumps being electrically independent of an interior of the second semiconductor chip.
11. The module according to claim 9 , further comprising a plurality of second dummy bumps provided on a second semiconductor chip of the semiconductor chips which faces the first semiconductor chip, the second dummy bumps being arranged in a plane along the first main surface at the positions where the first dummy bumps are arranged, the second dummy bumps contacting with the first dummy bumps, the second dummy bumps being electrically independent of an interior of the second semiconductor chip.
12. A semiconductor system comprising:
a mounting substrate on which a plurality of the semiconductor modules according to claim 1 are mounted; and
a cooling fluid supply pipe connected to the semiconductor modules.
13. A semiconductor module comprising:
an interconnect substrate having a first main surface;
a plurality of semiconductor chips stacked on the first main surface, the semiconductor chips having a base and connection bumps, mutually facing two of the bases and the interconnect substrate being apart from each other, the connection bumps electrically connecting the mutually facing two of the bases and the interconnect substrate together, the connection bumps being in line in a first plane along the first main surface to form paths, ends of the paths being connected to conduits, a cooling fluid being supplied to the paths through one of the conduits and being discharged from the paths through another one of the conduits; and
a plurality of insulating sealing members which seal the connection bumps without burying the paths.
14. The module according to claim 13 , wherein in the first plane, the paths extend from a first side of sides defining a shape of one of the semiconductor chips, to a second one of the sides.
15. The module according to claim 13 , wherein a first semiconductor chip of the semiconductor chips is in a rectangular shape in the first plane,
the connection bumps are formed along a pair of opposite sides of the first semiconductor chip in the first plane; and
the paths extend between a remaining pair of sides of the first semiconductor chip in the first plane.
16. The module according to claim 13 , further comprising substrate connecting terminals provided on a second main surface opposite to the first main surface to electrically connect the interconnect substrate to a mounting substrate which faces the second main surface.
17. A semiconductor module comprising:
an interconnect substrate having a first main surface;
a plurality of semiconductor chips stacked on the first main surface, the semiconductor chips having a base and connection bumps, mutually facing two of the bases and the interconnect substrate being apart from each other, the connection bumps electrically connecting the mutually facing two of the bases and the interconnect substrate together, the connection bumps being in line in a first plane along the first main surface to form paths;
a plurality of insulating sealing members which seal the connection bumps without burying the paths; and
substrate connecting terminals provided on the first main surface to electrically connect the interconnect substrate to a mounting substrate which faces the first main surface.
18. A semiconductor module comprising:
an interconnect substrate having a first main surface;
a plurality of semiconductor chips stacked on the first main surface, the semiconductor chips having a base and connection bumps, mutually facing two of the bases and the interconnect substrate being apart from each other, the connection bumps electrically connecting the mutually facing two of the bases and the interconnect substrate together, the connection bumps being in line in a first plane along the first main surface to form paths;
a plurality of insulating sealing members which seal the connection bumps without burying the paths; and
a plurality of first dummy bumps which are disposed in the path on the first semiconductor chip of the semiconductor chips and which are electrically independent of an interior of the first semiconductor chip.
19. A semiconductor system comprising:
a mounting substrate on which a plurality of the semiconductor modules according to claim 14 are mounted; and
a cooling fluid supply pipe connected to the semiconductor modules.