IP Library Granted Patent US 7,132,360
Granted Patent B2
US 7,132,360 · App. 10/865,268 · Granted Nov 7, 2006

Method for treating a semiconductor surface to form a metal-containing layer

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Quick Facts
Patent No.
US 7,132,360
App. No.
10/865,268
Granted
Nov 7, 2006
Kind
B2
Abstract

A method for treating a semiconductor surface to form a metal-containing layer includes providing a semiconductor substrate having an exposed surface. The exposed surface of the semiconductor substrate is treated by forming one or more metals overlying the semiconductor substrate but not completely covering the exposed surface of the semiconductor substrate. The one or more metals enhance nucleation for subsequent material growth. A metal-containing layer is formed on the exposed surface of the semiconductor substrate that has been treated. The treatment of the exposed surface of the semiconductor substrate assists the metal-containing layer to coalesce. In one embodiment, treatment of the exposed surface to enhance nucleation may be performed by spin-coating, atomic layer deposition (ALD), physical layer deposition (PVD), electroplating, or electroless plating. The one or more metals used to treat the exposed surface may include any rare earth or transition metal, such as, for example, hafnium, lanthanum, etc.

Claims (59)

1. A method comprising:

providing a semiconductor substrate having an exposed surface;

treating the exposed surface of the semiconductor substrate by forming one or more metals overlying the semiconductor substrate but not completely covering the exposed surface of the semiconductor substrate, the one or more metals enhancing nucleation for subsequent material growth; and

forming a continuous metal-containing layer on the exposed surface of the semiconductor substrate and over the one or more metals, wherein treatment of the exposed surface of the semiconductor substrate assists the continuous metal-containing layer to coalesce.

2. The method of claim 1 wherein treating the exposed surface of the semiconductor substrate further comprises:

treating the exposed surface by using a spin-on solution where the one or more metals are dissolved.

3. The method of claim 2 further comprising using a spin-on solution that is formed by dissolving at least one metal-containing precursor into a solvent.

4. The method of claim 3 wherein the solvent is water and the at least one metal-containing precursor is a metal halide.

5. The method of claim 2 wherein a spun-on metal results in a metal hydroxyl (MOxHy) termination on the exposed surface of the semiconductor substrate.

6. The method of claim 1 wherein treating the exposed surface of the semiconductor substrate further comprises:

treating the exposed surface of the semiconductor substrate with one or more metals by using an atomic layer deposition (ALD).

7. The method of claim 1 wherein treating the exposed surface of the semiconductor substrate further comprises:

treating the exposed surface of the semiconductor substrate with one or more metals by using at least one metal-containing precursor in a chemical vapor deposition.

8. The method of claim 1 wherein treating the exposed surface of the semiconductor substrate further comprises:

plating to form the one or metals on the exposed surface of the semiconductor substrate.

9. The method of claim 8 wherein the plating further comprises:

electroplating or electroless plating of the one or more metals.

10. The method of claim 1 wherein treating the exposed surface of the semiconductor substrate further comprises depositing the one or metals by physical vapor deposition (PVD).

11. The method of claim 1 wherein forming the metal-containing layer is a deposition of at least one of a metal oxide, a metal silicate or a metal aluminate.

12. The method of claim 1 wherein treating the exposed surface of the semiconductor substrate with one or more metals to form sites of no greater than a single atomic thickness further comprises treating the exposed surface of the semiconductor substrate with hafnium.

13. The method of claim 1 wherein treating the exposed portion of the semiconductor substrate with one or more metals further comprises forming one or more metals of no greater than a single atomic thickness in at least a portion of the exposed surface.

14. The method of claim 1 further comprising:

processing the exposed surface of the semiconductor substrate prior to said treating to: (1) leave the exposed surface with a substantially hydrogen terminated surface; (2) leave the exposed surface with a substantially hydroxyl terminated surface; (3) thermally grow a silicon oxide layer of a predetermined thickness on the exposed surface of the semiconductor substrate; or (4) thermally grow a silicon oxide layer and etch back the silicon oxide layer to a predetermined thickness on the exposed surface of the semiconductor substrate.

15. The method of claim 1 , further comprising:

annealing the metal-containing layer.

16. A method comprising:

providing a semiconductor substrate having an exposed surface;

treating the exposed surface of the semiconductor substrate with one or more metals to form a substantially uniform distribution of metal atoms of areal density greater than 1×10 14 /cm 2 and less than 5×10 15 /cm 2 on the exposed surface, the one or more metals enhancing nucleation for subsequent material growth; and

forming a continuous metal-containing layer on the exposed surface of the semiconductor substrate and over the one or more metals, the one or more metals assisting the continuous metal-containing layer to completely cover the semiconductor substrate within a predetermined amount of formation time.

17. The method of claim 16 wherein treating the exposed surface of the semiconductor substrate further comprises:

treating the exposed surface by using a spin-on solution where the one or more metals are dissolved.

18. The method of claim 16 further comprising using a spin-on solution that is formed by dissolving at least one metal-containing precursor into a solvent.

19. The method of claim 18 wherein the solvent is water and the at least one metal-containing precursor is a metal halide.

20. The method of claim 16 wherein a spun-on metal results in a metal hydroxyl (MOxHy) termination on the exposed surface of the semiconductor substrate.

21. The method of claim 16 wherein treating the exposed surface of the semiconductor substrate further comprises:

treating the exposed surface of the semiconductor substrate with one or more metals by using an atomic layer deposition (ALD).

22. The method of claim 16 wherein treating the exposed surface of the semiconductor substrate further comprises:

treating the exposed surface of the semiconductor substrate with one or more metals by using at least one metal-containing precursor in a chemical vapor deposition.

23. The method of claim 16 wherein treating the exposed surface of the semiconductor substrate further comprises:

plating to form the one or more metals on the exposed surface of the semiconductor substrate.

24. The method of claim 23 wherein the plating further comprises: electroplating or electroless plating of the one or more metals.

25. The method of claim 16 wherein treating the exposed surface of the semiconductor substrate further comprises depositing the one or metals by physical vapor deposition (PVD).

26. The method of claim 16 wherein forming the metal-containing layer by forming at least one of a metal oxide, a metal silicate or a metal aluminate.

27. The method of claim 16 wherein treating the exposed surface of the semiconductor substrate with one or more metals to form sites of no greater than a single atomic thickness further comprises treating the exposed surface of the semiconductor substrate with hafnium.

28. The method of claim 16 further comprising:

forming the metal-containing layer by one of atomic layer deposition (ALD) or chemical vapor deposition (CVD).

29. The method of claim 16 further comprising:

forming a dielectric layer on the semiconductor substrate prior to the treating; and

etching a portion of the dielectric layer prior to forming the metal-containing layer to remove any oxide from the exposed surface of the substrate.

30. The method of claim 16 further comprising: thermally growing a surface oxide on the substrate prior to forming the metal-containing layer.

31. The method of claim 16 further comprising:

annealing the metal-containing layer.

32. A method comprising:

providing a substrate;

providing a dielectric layer overlying the substrate;

treating an exposed surface of the dielectric layer by forming a plurality of metallic atoms on the exposed surface, the plurality of metallic atoms assisting in subsequent material growth on the dielectric layer, wherein a portion of the dielectric layer remains exposed after the treating; and

forming a metal-containing layer overlying the dielectric layer and the plurality of metallic atoms, the metal-containing layer using the plurality of metallic atoms to obtain complete surface coverage with metal of the dielectric layer.

33. The method of claim 32 further comprising:

treating the exposed surface of the dielectric layer by spinning on hafnium oxide onto the exposed surface of the dielectric layer.

Assignments (15)
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Feb 2, 2007
From: FREESCALE SEMICONDUCTOR, INC.; FREESCALE ACQUISITION CORPORATION; FREESCALE ACQUISITION HOLDINGS CORP.; FREESCALE HOLDINGS (BERMUDA) III, LTD.
To: CITIBANK, N.A. AS COLLATERAL AGENT
Reel/Frame 018855/0129 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2004
From: SCHAEFFER, JAMES K.; ROAN, DARRELL; TRIYOSO, DINA H.; ADETUTU, OLUBUNMI O.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 015459/0725 →