IP Library Granted Patent US 6,987,063
Granted Patent B2
US 6,987,063 · App. 10/865,452 · Granted Jan 17, 2006

Method to reduce impurity elements during semiconductor film deposition

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Quick Facts
Patent No.
US 6,987,063
App. No.
10/865,452
Granted
Jan 17, 2006
Kind
B2
Abstract

A metal-containing semiconductor layer having a high dielectric constant is formed with a method that avoids inclusion of contaminant elements that reduce dielectric constant of metals. The metal-containing semiconductor layer is formed overlying a substrate in a chamber. A precursor is introduced to deposit at least a portion of the metal-containing semiconductor layer. The precursor contains one or more elements that, if allowed to deposit in the metal-containing layer, would become impurity elements. A reactant gas is used to purify the metal-containing layer by removing impurity elements from the metal-containing layer which were introduced into the chamber by the precursor.

Claims (45)

1. A method for forming a metal-containing layer, comprising:

providing a semiconductor substrate;

introducing a precursor to deposit the metal-containing layer over the semiconductor substrate; and

exposing the semiconductor substrate to a reactant to purify the metal-containing layer by reacting the reactant with impurity elements from the metal-containing layer to remove the impurity elements, wherein the impurity elements were introduced by the precursor.

2. The method of claim 1 , wherein the precursor comprises a metal element of the metal-containing layer and at least one impurity element.

3. The method of claim 2 , wherein the impurity elements comprise at least one of silicon, nitrogen, or carbon.

4. The method of claim 3 , wherein the reactant comprises one of fluorine or chlorine.

5. The method of claim 1 , wherein the metal-containing layer comprises an element selected from a group consisting of hafnium, lanthanum, zirconium, yttrium, titanium, tantalum, Ru, Ir, Pd and Pt.

6. The method of claim 1 , wherein the metal-containing layer is further characterized as a metal oxide layer and comprises a material selected from a group consisting of hafnium oxide, lanthanum oxide, zirconium oxide, yttrium oxide, tantalum oxide, and titanium oxide.

7. The method of claim 1 , wherein the reactant comprises one of fluorine or chlorine.

8. The method of claim 1 , wherein the semiconductor substrate is exposed to the reactant after introducing the precursor.

9. The method of claim 1 , wherein introducing the precursor and exposing the semiconductor substrate to the reactant are performed at least partially simultaneously.

10. The method of claim 1 , wherein the precursor is introduced after exposing the semiconductor substrate.

11. The method of claim 1 , wherein introducing the precursor to deposit the metal-containing layer over the semiconductor substrate corresponds to an atomic layer deposition (ALD) of the metal-containing layer.

12. The method of claim 1 , wherein introducing the precursor to deposit the metal-containing layer over the semiconductor substrate corresponds to a metal organic chemical vapor deposition (MOCVD) of the metal-containing layer.

13. The method of claim 1 , wherein exposing the semiconductor substrate to the reactant to purify the metal-containing layer by removing impurity elements from the metal-containing layer which were introduced by the precursor further comprises removing impurity elements which have not deposited onto the semiconductor substrate.

14. The method of claim 1 , further comprising:

forming an interfacial layer over the semiconductor substrate, wherein the metal-containing layer is deposited over the interfacial layer.

15. The method of claim 1 , further comprising:

exposing the semiconductor substrate to an oxidant, wherein the oxidant includes one of water (H 2 O), deuterated water (D 2 O), oxygen (O 2 ), or ozone (O 3 ).

16. The method of claim 1 , wherein the reactant that the semiconductor substrate is exposed to is at least partially ionized.

17. A method for forming a metal-containing layer, comprising:

providing a semiconductor substrate;

introducing a precursor to deposit the metal-containing layer over the semiconductor substrate; and

exposing the semiconductor substrate to a reactant to purify the metal-containing layer by reacting the reactant with impurity elements to remove the impurity elements, wherein the impurity elements were introduced by the precursor and wherein the precursor does not include the reactant.

18. The method of claim 17 , wherein the impurity elements that are removed have not been deposited onto the semiconductor substrate.

19. The method of claim 17 , wherein the precursor comprises a metal element of the metal-containing layer and at least one impurity element.

20. The method of claim 19 , wherein the impurity elements comprise at least one of silicon, nitrogen, or carbon.

21. The method of claim 20 , wherein the reactant comprises one of fluorine or chlorine.

22. The method of claim 17 , wherein the metal-containing layer comprises an element selected from a group consisting of hafnium, lanthanum, zirconium, yttrium, titanium, tantalum, Ru, Ir, Pd and Pt.

23. The method of claim 17 , wherein the metal-containing layer is further characterized as a metal oxide layer and comprises a material selected from a group consisting of hafnium oxide, lanthanum oxide, zirconium oxide, yttrium oxide, tantalum oxide, and titanium oxide.

24. The method of claim 17 , wherein the reactant comprises one of fluorine or chlorine.

25. The method of claim 17 , wherein introducing the precursor and exposing the semiconductor substrate to the reactant are performed at least partially simultaneously.

26. The method of claim 17 , wherein introducing the precursor to deposit the metal-containing layer over the semiconductor substrate corresponds to one of an atomic layer deposition (ALD) of the metal-containing layer or to a metal organic chemical vapor deposition (MOCVD) of the metal-containing layer.

27. The method of claim 17 , further comprising:

forming an interfacial layer over the semiconductor substrate, wherein the metal-containing layer is deposited over the interfacial layer.

28. The method of claim 17 , further comprising:

exposing the semiconductor substrate to an oxidant, wherein the oxidant includes one of water (H 2 O), deuterated water (D 2 O), oxygen (O 2 ) or ozone (O 3 ).

29. The method of claim 17 , wherein the reactant that the semiconductor substrate is exposed to is at least partially ionized.

30. A method for forming a metal oxide layer, comprising:

providing a semiconductor substrate;

introducing a precursor to deposit a metal oxide layer over the semiconductor substrate, wherein the metal oxide layer includes one of hafnium oxide or lanthanum oxide; and

exposing the semiconductor substrate to a reactant to purify the metal oxide layer by reacting the reactant with impurity elements from the metal oxide layer to remove the impurity elements, wherein the impurity elements were introduced by the precursor, and wherein the reactant includes one of fluorine or chlorine.

31. The method of claim 30 , wherein after introducing the precursor and exposing the semiconductor substrate to the reactant, the metal oxide layer includes at most 5% of any impurity element.

32. The method of claim 30 , wherein introducing the precursor and exposing the semiconductor substrate to the reactant are performed at least partially simultaneously.

Assignments (17)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
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From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
PATENT RELEASE Recorded Dec 21, 2015
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To: FREESCALE SEMICONDUCTOR, INC.
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SECURITY AGREEMENT Recorded Nov 6, 2013
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To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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