Method for forming isolation layer of semiconductor device

1. A method for forming an isolation layer of a semiconductor device, the method comprising the steps of:

etching a silicon substrate having a cell region and a peripheral circuit region, forming a first trench having a first size in the cell region, and forming a second trench having a second size, which is larger than the first size of the first trench, in the peripheral circuit region;

forming a sidewall oxide layer on surfaces of the first trench and the second trench;

sequentially depositing a liner nitride layer and a liner oxide layer on a resultant substrate inclusive of the sidewall oxide layer;

performing a plasma pre-heating process using O 2 +He with respect to the resultant substrate in an HDP CVD process chamber and selectively oxidizing a portion of the liner nitride layer remaining on a bottom of the second trench in the peripheral circuit region;

continuously depositing an HDP oxide layer on the resultant substrate having been subjected to the plasma pre-heating process, thereby filling the trenches; and

performing a chemical mechanical polishing process with respect to the HDP oxide layer.

2. The method for forming an isolation layer of a semiconductor device as claimed in claim 1 , wherein the sidewall oxide layer is grown to have a thickness of 75 to 85 Å, the liner nitride layer is deposited to have a thickness of 45 to 55 Å, and the liner oxide layer is deposited to have a thickness of 20 to 60 Å.

3. The method for forming an isolation layer of a semiconductor device as claimed in claim 1 , wherein the plasma pre-heating process step using O 2 +He is carried out for 100 to 200 seconds under conditions in which bias power is 3 to 5 kW, and O 2 gas and H 2 gas flow by as much as 50 to 200 sccm respectively.

4. A method for forming an isolation layer of a semiconductor device, the method comprising the steps of:

etching a silicon substrate having a cell region and a peripheral circuit region, forming a first trench having a first size in the cell region, and forming a second trench having a second size, which is larger than the first size of the first trench, in the peripheral circuit region;

forming a sidewall oxide layer on surfaces of the first trench and the second trench;

depositing a liner nitride layer on a resultant substrate inclusive of the sidewall oxide layer;

performing a plasma pre-heating process using O 2 +He with respect to the resultant substrate in an HDP CVD process chamber and selectively oxidizing a portion of the liner nitride layer remaining on a bottom of the second trench in the peripheral circuit region;

continuously depositing an HDP oxide layer on the resultant substrate having been subjected to the plasma pre-heating process, thereby filling the trenches; and

performing a chemical mechanical polishing process with respect to the HDP oxide layer.

5. The method for forming an isolation layer of a semiconductor device as claimed in claim 4 , wherein the sidewall oxide layer is grown to have a thickness of 75 to 85 Å and the liner nitride layer is deposited to have a thickness of 60 to 100 Å.

6. The method for forming an isolation layer of a semiconductor device as claimed in claim 4 , wherein the plasma pre-heating process step using O 2 +He is carried out for 100 to 200 seconds under conditions in which bias power is 3 to 5 kW, and O 2 gas and H 2 gas flow by as much as 50 to 200 sccm respectively.